ARM: imx6: DHCOM i.MX6 PDK: use Kconfig for inclusion of DDR calibration
authorLudwig Zenz <lzenz@dh-electronics.de>
Mon, 15 Apr 2019 09:13:08 +0000 (11:13 +0200)
committerStefano Babic <sbabic@denx.de>
Thu, 25 Apr 2019 17:16:24 +0000 (19:16 +0200)
commitaa34505653a3006ed4ad511da5d56a796d2ddf52
tree6d1d7ebf6b8d33e2ba77c1928c6f71ffb7df7cab
parenta44ca1346dc7fdba4ae4f2906078f6b737c3f109
ARM: imx6: DHCOM i.MX6 PDK: use Kconfig for inclusion of DDR calibration

The four x16 DDR3 are wired in T-topology. From NXP AN4467:
'Although not required, T-Topologies may also benefit from performing
Write Leveling as there are package delays on both the processor and DDR
devices that can be de-skewed by performing Write Leveling. Therefore,
Freescale recommends determining Write Leveling calibration parameters
for all boards, regardless of topology used.'
That is why write level calibration is also done.

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
board/dhelectronics/dh_imx6/dh_imx6_spl.c