driver/ddr/fsl: Add workaround for A009663
authorShengzhou Liu <Shengzhou.Liu@freescale.com>
Wed, 16 Dec 2015 08:45:41 +0000 (16:45 +0800)
committerYork Sun <york.sun@nxp.com>
Mon, 25 Jan 2016 16:24:15 +0000 (08:24 -0800)
commita994b3deb00bf3177cdf9f92060baec4f640f466
treee7e7a70b20a26ab4d63ff55ea91b867343a03b23
parent6f14e257c472c895499c186b602861e90f2656b5
driver/ddr/fsl: Add workaround for A009663

Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0
before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE]
to the desired value after DDR initialization has completed.

When DDR controller is configured to operate in auto-precharge
mode(DDR_INTERVAL[BSTOPRE]=0), this workaround is not needed.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/include/asm/arch-fsl-layerscape/config.h
arch/arm/include/asm/arch-ls102xa/config.h
arch/powerpc/cpu/mpc85xx/cmd_errata.c
arch/powerpc/include/asm/config_mpc85xx.h
drivers/ddr/fsl/fsl_ddr_gen4.c
include/fsl_ddr_sdram.h