fpga: arria10: Fix error in fpga pin configuration
authorDalon Westergreen <dalon.westergreen@intel.com>
Tue, 16 Jul 2019 16:28:10 +0000 (09:28 -0700)
committerMarek Vasut <marex@denx.de>
Sun, 21 Jul 2019 10:47:13 +0000 (12:47 +0200)
commita89c2adc3d2834a7c79c1685155a8b8952cf77f4
treec25941aeb9460fdd1f51ae5f67b4ad525abdc2a5
parenta8b5031108a22f41234cc3b0c7e4e4e6f6e77cb8
fpga: arria10: Fix error in fpga pin configuration

Pin configuration of the FPGA devicetree block should be done
after core configuration in the arria10 fpga driver.  This fix
corrects the check of status, and ensures that the fpga pin mux
is configured on correct configuration of the core fpga image.

Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
drivers/fpga/socfpga_arria10.c