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(parent: c7400e4) | patch
ARM: DRA7: Update DDR IO configuration
authorLokesh Vutla <lokeshvutla@ti.com>
Wed, 3 Jun 2015 09:13:26 +0000 (14:43 +0530)
committerTom Rini <trini@konsulko.com>
Fri, 12 Jun 2015 16:43:06 +0000 (12:43 -0400)
commita5c5c5b500bd7cee5f5d260c538429fe1bcc0ae1
tree47601372443e14ab2e2ca2f4bf4ad3878121a63ctree | snapshot
parentc7400e4882d8bf5c48f7d9ecc243987368dac2bacommit | diff
ARM: DRA7: Update DDR IO configuration

DDRIO_2 and LPDDR2CH1_1 registers are not present
for DRA7. So not configuring these registers for DRA7xx

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
arch/arm/cpu/armv7/omap5/hwinit.c diff | blob | history
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