ar71xx: enable ddr wb flush on qca955x
authorTomislav Požega <pozega.tomislav@gmail.com>
Tue, 3 Sep 2019 15:10:31 +0000 (17:10 +0200)
committerKoen Vandeputte <koen.vandeputte@ncentric.com>
Wed, 11 Sep 2019 07:57:28 +0000 (09:57 +0200)
commita3c3a8c5ab98dd580ca5ea182b71d034432e69be
treed0cf61a515e8fd4e81c4cc024c04b88036296550
parentaf91a370de2b94a37b8a87a9f95503e96dfcb744
ar71xx: enable ddr wb flush on qca955x

Enable flushing of write buffers on qca955x. GPL code has 0x88 reg
defined for PCI flush which is likely an error since the device
freezes on boot. So use DS default value 0xA8 for PCI flush.

Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
(cherry picked from commit fe9e702dc94ece2a004f6db68d6fb9a94d9437cb)
target/linux/ar71xx/patches-4.14/952-qca955x-enable-ddr-wb-flush.patch [new file with mode: 0644]