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soc: ti: k3-navss-ringacc: Flush/invalidate caches on ring push/pop
authorVignesh Raghavendra <vigneshr@ti.com>
Mon, 9 Dec 2019 04:55:33 +0000 (10:25 +0530)
committerLokesh Vutla <lokeshvutla@ti.com>
Mon, 20 Jan 2020 04:40:28 +0000 (10:10 +0530)
commit9d32a94bce5e5a184eff0fbef860c1bbc87cd3a0
tree8b1b5c2795d425d974ea899551d3111a85a37260tree | snapshot
parenta8837cf43839394fb16d6033641181e2309c8c2bcommit | diff
soc: ti: k3-navss-ringacc: Flush/invalidate caches on ring push/pop

Flush caches when pushing an element to ring and invalidate caches when
popping an element from ring in Exposed Ring mode. Otherwise DMA
transfers don't work properly in R5 SPL (with caches enabled) where the
core is not in coherency domain.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
drivers/soc/ti/k3-navss-ringacc.c diff | blob | history
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