rockchip: clk: rk3399: add clock support for SCLK_SPI1 and SCLK_SPI5
authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Thu, 20 Apr 2017 20:05:49 +0000 (22:05 +0200)
committerSimon Glass <sjg@chromium.org>
Wed, 10 May 2017 19:37:21 +0000 (13:37 -0600)
commit8fa6979bebc91451d78ae49375a933f9e21cc755
tree8fa31606079f333954c65b42e4e267e3cda7ec02
parentda10dd1a723e27291d8f30effada2b0a47a43f12
rockchip: clk: rk3399: add clock support for SCLK_SPI1 and SCLK_SPI5

This change adds support for configuring the module clocks for SPI1 and
SPI5 from the 594MHz GPLL.

Note that the driver (rk_spi.c) always sets this to 99MHz, but the
implemented functionality is more general and will also support
different clock configurations.

X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
drivers/clk/rockchip/clk_rk3399.c