arm: mx6: Clamp MMDC and DDR3 clocks for timing calculations
authorNikolay Dimitrov <picmaster@mail.bg>
Wed, 22 Apr 2015 15:37:31 +0000 (18:37 +0300)
committerStefano Babic <sbabic@denx.de>
Fri, 15 May 2015 17:20:46 +0000 (19:20 +0200)
commit8a2bd215a26baf73f06ad64f0ac276f8172cd3d8
tree900551668db68ca135a861d2eb33d46c9a5de9f3
parent19f74d885f4bfa714010efbe2eea496045002c72
arm: mx6: Clamp MMDC and DDR3 clocks for timing calculations

This is proposal for clamping the MMDC/DDR3 clocks to the maximum supported
frequencies as per imx6 SOC models, and for dynamically calculating valid
clock value based on mem_speed.

Currently the code uses impossible values for mem_speed (1333, 1600 MT/s) for
calculating the DDR timings, and uses fixed clock (528 or 400 MHz) which
doesn't take into account DDR3 memory limitations.

Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
arch/arm/cpu/armv7/mx6/ddr.c