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arm: dts: Stratix10: change pad skew values for EMAC0 PHY driver
authorOoi, Joyce <joyce.ooi@intel.com>
Thu, 21 Nov 2019 14:48:56 +0000 (06:48 -0800)
committerMarek Vasut <marex@denx.de>
Fri, 22 Nov 2019 02:08:12 +0000 (03:08 +0100)
commit7dad444c765ab94bf70592c502df9d1e1f72d436
treee63b417eecb5c27a546648d2d88f39fe760e52batree | snapshot
parent48f23dd6a410d84499c9de1ae16dde9d10cb5fc7commit | diff
arm: dts: Stratix10: change pad skew values for EMAC0 PHY driver

The HPS EMAC0 drive strength is changed to 4mA because the initial 8mA
drive strength has caused CE test to fail. This requires changes on the
pad skew for EMAC0 PHY driver. Based on several measurements done, Tx
clock does not require the extra 0.96ns delay which was needed in
Arria10.

Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
arch/arm/dts/socfpga_stratix10_socdk.dts diff | blob | history
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