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mmc: matsushita-common: Handle Renesas div-by-1
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Tue, 26 Sep 2017 18:34:35 +0000 (20:34 +0200)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Wed, 11 Apr 2018 21:11:58 +0000 (23:11 +0200)
commit78773f1467336f4d874a6de8e56a5092b786fde5
tree256bce0922fe3b34ebe2578b4610c4844181d86etree | snapshot
parentf98833dbe61e8784f6c7afed8f5ff9290973d211commit | diff
mmc: matsushita-common: Handle Renesas div-by-1

On the Renesas version of the IP, the /1 divider is realized by
setting the clock register [7:0] to 0xff instead of setting bit
10 of the register. Check the quirk and handle accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
drivers/mmc/matsushita-common.c diff | blob | history
drivers/mmc/matsushita-common.h diff | blob | history
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