x86: Add SPI support to quark/galileo
authorBin Meng <bmeng.cn@gmail.com>
Wed, 4 Feb 2015 08:26:12 +0000 (16:26 +0800)
committerSimon Glass <sjg@chromium.org>
Fri, 6 Feb 2015 19:07:45 +0000 (12:07 -0700)
commit728b393f3b012ac46505151b80af1d4334786845
treef7a9eaa7476cad5432886ee7d121044d7adc035a
parent38fc1cdae0fb7a429222b7b85f8cdaefbd078e21
x86: Add SPI support to quark/galileo

The Quark SoC contains a legacy SPI controller in the legacy bridge
which is ICH7 compatible. Like Tunnel Creek and BayTrail, the BIOS
control register offset in the ICH SPI driver is wrong for the Quark
SoC too, unprotect_spi_flash() is added to enable the flash write.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/quark/quark.c
arch/x86/dts/galileo.dts
drivers/spi/ich.c