mtd: spi: spi-nor-core: Add 4 Byte addressing support
authorVignesh R <vigneshr@ti.com>
Tue, 5 Feb 2019 05:59:19 +0000 (11:29 +0530)
committerJagan Teki <jagan@amarulasolutions.com>
Thu, 7 Feb 2019 10:03:21 +0000 (15:33 +0530)
commit61059bc55ab108bdd53c953480b3f84f9d6100ab
treef296085f214eb0d90baf50bd8738382aa86c91e0
parent492e65b29b4c75ba6139577e10c9a5a6747ffa5a
mtd: spi: spi-nor-core: Add 4 Byte addressing support

Sync changes from Linux SPI NOR framework to add 4 byte addressing
support. This is required in order to support flashes like MT35x
that no longer support legacy Bank Address Register(BAR) way of accessing
>16MB region.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
drivers/mtd/spi/spi-nor-core.c