Documentation: dts: Add pl310 cache controller dts documentation
authorDinh Nguyen <dinguyen@kernel.org>
Tue, 23 Apr 2019 21:55:01 +0000 (16:55 -0500)
committerTom Rini <trini@konsulko.com>
Sun, 5 May 2019 12:48:50 +0000 (08:48 -0400)
commit5c66e1e88426d47782324eef0d9d6fc11941c79f
tree8fb7e605ae98219369dcb5977abcd360b6e33a9b
parentc14f3c31112653f5c5a34b748e9defbd3bc5a8ef
Documentation: dts: Add pl310 cache controller dts documentation

Linux commit 8ecd7f5970c5 ("ARM: 8483/1: Documentation: l2c: Rename
l2cc to l2c2x0")

Linux docs:
Documentation/devicetree/bindings/arm/l2c2x0.txt

Copied from Linux kernel v5.0.

"The documentation in the l2cc.txt is specific to the L2 cache
controllers L2C210/L2C220/L2C310 (also known as PL210/PL220/PL310
and variants) and not generic as the file name implies. It's not
valid for integrated L2 controllers as found in e.g.
Cortex-A15/A7/A57/A53."

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Documentation/devicetree/bindings/arm/l2c2x0.txt [new file with mode: 0644]