arm: mvebu: fix SerDes table alignment
authorJoel Johnson <mrjoel@lixil.net>
Mon, 23 Mar 2020 20:21:29 +0000 (14:21 -0600)
committerStefan Roese <sr@denx.de>
Tue, 14 Apr 2020 11:16:42 +0000 (13:16 +0200)
commit4f7991ee1c34f2f0d80a680146aeff867d688dd9
tree694f86911bac91316ef243c08ddea7895290af4b
parentcecf38a75581b0d4c4922b9a4ff94a626604830e
arm: mvebu: fix SerDes table alignment

Tested on Solidrun ClearFog Base. Table alignment was:
 | Lane #  | Speed |  Type       |
 --------------------------------
 |   0    |  3   |  SATA0       |
 |   1    |  0   |  SGMII1      |
 |   2    |  3   |  SATA1       |
 |   3    |  5   |  USB3 HOST1  |
 |   4    |  5   |  USB3 HOST0  |
 |   5    |  4   |  SGMII2      |
 --------------------------------

After the change, it's correctly aligned as:
 | Lane # | Speed |  Type       |
 --------------------------------
 |   0    |   3   | SATA0       |
 |   1    |   0   | SGMII1      |
 |   2    |   5   | PCIe1       |
 |   3    |   5   | USB3 HOST1  |
 |   4    |   5   | PCIe2       |
 |   5    |   0   | SGMII2      |
 --------------------------------

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c