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(parent: e2c1c5b) | patch
power: pfuze100 correct SWBST macro definition
authorPeng Fan <Peng.Fan@freescale.com>
Fri, 7 Aug 2015 08:43:41 +0000 (16:43 +0800)
committerPrzemyslaw Marczak <p.marczak@samsung.com>
Wed, 12 Aug 2015 08:02:26 +0000 (10:02 +0200)
commit430abe1cd721aacc6a715f5e8b9192ea6bee96fc
tree8a7afd72199d11b21f1fd4dfb291530306aa1737tree | snapshot
parente2c1c5bae619d2e87505de99f907a26237640bc9commit | diff
power: pfuze100 correct SWBST macro definition

According to datasheet, SWBST_MODE starts from bit 2 and it occupies 2 bits.
So SWBST_MODE_MASK should be 0xC, and SWBST_MODE_xx should be ([mode] << 2).

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
include/power/pfuze100_pmic.h diff | blob | history
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