Introduce new low level init code for AR934x/QCA95xx and AR933x
authorPiotr Dymacz <pepe2k@gmail.com>
Sun, 21 Feb 2016 09:29:34 +0000 (10:29 +0100)
committerPiotr Dymacz <pepe2k@gmail.com>
Sun, 21 Feb 2016 09:29:34 +0000 (10:29 +0100)
commit2e15e082e0aa7ff0f14f831d4c9e498b94c909c5
treeb2f3d7ba706a51014bc15c087aab23b608204b0f
parent378f3d152da0ed05d77a4bc62af81f97c6893de6
Introduce new low level init code for AR934x/QCA95xx and AR933x

New code is simpler, more universal and supports:
- clock configuration stored in FLASH
- non-fractional PLL/clocks configuration
- recovery mode (sets safe clocks when recovery button is pressed)

This was tested on many different QC/A WiSoCs and platforms,
including new QCA95xx chips.

Code for AR933x still needs some additional work. The original code
from Atheros SDK is very buggy and includes lot of (still) unknown
parts, like "pmu setup", "meas", etc. It seems that most of that
is related with radio configuration.
u-boot/cpu/mips/ar7240/Makefile
u-boot/cpu/mips/ar7240/ar933x_pll_init.S
u-boot/cpu/mips/ar7240/ar934x_pll_init.S [deleted file]
u-boot/cpu/mips/ar7240/qca95xx_pll_init.S [new file with mode: 0755]
u-boot/include/soc/ar933x_pll_init.h [new file with mode: 0644]
u-boot/include/soc/qca95xx_pll_init.h [new file with mode: 0644]
u-boot/include/soc/qca_pll_list.h [new file with mode: 0644]