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(parent: fc33705) | patch
Initialise correct GPMC WAITx irq for AM33xx
authorMark Jackson <mpfj-list@mimc.co.uk>
Thu, 21 Feb 2013 02:49:38 +0000 (02:49 +0000)
committerTom Rini <trini@ti.com>
Fri, 22 Mar 2013 14:57:00 +0000 (10:57 -0400)
commit296de3bbec3aa7d9103a1fee121fbad3a97d3133
tree0e7091b45f48d3be403e5f4217f145451d1343f3tree | snapshot
parentfc33705e66cc2c753026f04f92555ad00b709f11commit | diff
Initialise correct GPMC WAITx irq for AM33xx

Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
Fix it such that WAIT0 irq is enabled instead.

Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
arch/arm/cpu/armv7/am33xx/mem.c diff | blob | history
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