x86: Add an option to control the position of SPL
authorSimon Glass <sjg@chromium.org>
Sat, 7 Dec 2019 04:42:30 +0000 (21:42 -0700)
committerBin Meng <bmeng.cn@gmail.com>
Sun, 15 Dec 2019 03:44:19 +0000 (11:44 +0800)
commit28d7d76a86a4e73db27b521d034fb6170df95672
tree29d92af5fbea9ec478d3ec4786d90ba9c1ac2cf0
parentb31129528e7dbbfb67a93116b40fbb1b1d4d724b
x86: Add an option to control the position of SPL

For Apollo Lake SPL is run from CAR (cache-as-RAM) which is in a different
location from where SPL must be placed in ROM. In other words, although
SPL runs before SDRAM is set up, it is not execute-in-place (XIP).

Add a Kconfig option for the ROM position.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/Kconfig
arch/x86/dts/u-boot.dtsi