fpga: zynqpl: Check fpga config completion
authorT Karthik Reddy <t.karthik.reddy@xilinx.com>
Tue, 12 Mar 2019 14:50:20 +0000 (20:20 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 24 Jun 2020 11:07:58 +0000 (13:07 +0200)
commit1d9632a3ccca00638ace1ff6bbce7eba1e15aac7
tree80c8905ca178e44b698da0bb1bc3adb0befa558e
parent3427f4d2045729c8995b19407daf91ea9a50e4f8
fpga: zynqpl: Check fpga config completion

This patch checks fpga config completion when a bitstream is loaded
into PL.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/fpga/zynqpl.c