armv8/fsl-lsch2: Implement workaround for PIN MUX erratum A010539
authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Thu, 29 Sep 2016 04:42:44 +0000 (12:42 +0800)
committerYork Sun <york.sun@nxp.com>
Thu, 6 Oct 2016 16:57:36 +0000 (09:57 -0700)
commit0ea3671d35dc5a6f2555bb5307d76e229e81f47d
tree1cbe9bcac69186e6b995f66b8e976d85cbb6ed64
parentadee1d4c9eb16a49ec1396b3367d027b7c3d2940
armv8/fsl-lsch2: Implement workaround for PIN MUX erratum A010539

Pin mux logic has 2 options in priority order, one is through RCW_SRC
and then through RCW_Fields. In case of QSPI booting, RCW_SRC logic
takes the priority for SPI pads and do not allow RCW_BASE and SPI_EXT
to control the SPI muxing. But actually those are DSPI controller's
pads instead of QSPI controller's, so this workaround allows RCW
fields SPI_BASE and SPI_EXT to control relevant pads muxing.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[York Sun: Reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
arch/arm/cpu/armv8/fsl-layerscape/soc.c
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h