ARM: tegra: Make cache line size SoC specific
authorThierry Reding <treding@nvidia.com>
Thu, 18 Jul 2013 19:13:40 +0000 (12:13 -0700)
committerTom Warren <twarren@nvidia.com>
Mon, 19 Aug 2013 22:31:37 +0000 (15:31 -0700)
commit0d79f4f490352f6e1500cdd12a3b0e8b17265bde
tree22fa69c5699349157e4c5848e84b13a9b2d6736c
parent9ed887caecb9ecb0c68773a1870d143b9f28d3da
ARM: tegra: Make cache line size SoC specific

Currently all Tegra SoCs are assumed to have 32 byte cache lines. This
isn't true for Tegra114, however, which uses 4 Cortex-A15 cores and
therefore uses a cache line size of 64 bytes. Move the cache line size
setting to the per-SoC common configuration file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
include/configs/tegra-common.h
include/configs/tegra114-common.h
include/configs/tegra20-common.h
include/configs/tegra30-common.h