arm: mvebu: Add Marvell's integrated CPUs
authorChris Packham <judge.packham@gmail.com>
Thu, 11 Apr 2019 10:22:50 +0000 (22:22 +1200)
committerStefan Roese <sr@denx.de>
Fri, 12 Apr 2019 05:04:18 +0000 (07:04 +0200)
commit0d0df46ee7323506df2e38738c52d68699c2abca
tree61ef85055d53ab675f5b1489121891bcdd68ab38
parent237b629e4cd8fd8ffa9664a1b71b7eda1d2f2179
arm: mvebu: Add Marvell's integrated CPUs

Marvell's switch chips with integrated CPUs (collectively referred to as
MSYS) share common ancestry with the Armada SoCs. Some of the IP blocks
(e.g. xor) are located at different addresses and DFX server exists as a
separate target on the MBUS (on Armada-38x it's just part of the core
complex registers).

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
arch/arm/mach-mvebu/Kconfig
arch/arm/mach-mvebu/Makefile
arch/arm/mach-mvebu/cpu.c
arch/arm/mach-mvebu/include/mach/config.h
arch/arm/mach-mvebu/include/mach/cpu.h
arch/arm/mach-mvebu/include/mach/soc.h
arch/arm/mach-mvebu/mbus.c
drivers/ddr/marvell/axp/xor_regs.h