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(parent: c3ec370) | patch
stm32mp1: ram: increase the delay after reset to 128 cycles
authorPatrick Delaunay <patrick.delaunay@st.com>
Wed, 10 Apr 2019 12:09:22 +0000 (14:09 +0200)
committerPatrice Chotard <patrice.chotard@st.com>
Thu, 23 May 2019 09:38:10 +0000 (11:38 +0200)
commit0cb1aa94093c22dd5b3dce32d371e154abc06ffe
tree49ed36ed0ab1c83ab82b0aa849454638365460f0tree | snapshot
parentc3ec370aed1d64c70578b22b18bed5c05f040962commit | diff
stm32mp1: ram: increase the delay after reset to 128 cycles

Component Notification DDR controller errata (3.00a):9001313030
Synchronization Time Waited After De-assertion of presetn is
128 pclk Cycles.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
drivers/ram/stm32mp1/stm32mp1_ddr.c diff | blob | history
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