spi: mvebu_a3700_spi: Fix clock prescale computation
authorMarek Behún <marek.behun@nic.cz>
Tue, 23 Jul 2019 14:49:32 +0000 (16:49 +0200)
committerJagan Teki <jagan@amarulasolutions.com>
Mon, 16 Sep 2019 02:39:22 +0000 (08:09 +0530)
commit07a5cb9d3b9bf9bca9ca207b82f92eac73cbdda8
tree3f2db1a85c43f293b5cd76444118a12943bbcbc2
parent23b93e33adde0a8313388eda7c78d1d0786e3c92
spi: mvebu_a3700_spi: Fix clock prescale computation

The prescaler value computation can yield wrong result if given 0x1f at
the beginning: the value is computed to be 0x20, but the maximum value
the register can hold 0x1f, so the actual stored value in this case is
0, which is obviously wrong.
Set the upper bound of the value to 0x1f with the min macro.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
drivers/spi/mvebu_a3700_spi.c