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(parent: 659ca2d) | patch
ARM: imx6: DHCOM i.MX6 PDK: ddr init for 32bit bus and 4GBit chips
authorLudwig Zenz <lzenz@dh-electronics.de>
Thu, 5 Jul 2018 07:23:48 +0000 (09:23 +0200)
committerStefano Babic <sbabic@denx.de>
Mon, 23 Jul 2018 09:02:14 +0000 (11:02 +0200)
commit0481bef035f5281d075549eb18cc6949dfbc42ff
treedcd566c894f08a56fa44825a60bec590add3e4cbtree | snapshot
parent659ca2dd08cc669a259c8205c8b4ac63b06911e6commit | diff
ARM: imx6: DHCOM i.MX6 PDK: ddr init for 32bit bus and 4GBit chips

Support 1GIB + 2GIB DDR3 with 64bit bus width and 512MIB + 1GIB with 32bit bus width

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
board/dhelectronics/dh_imx6/dh_imx6_spl.c diff | blob | history
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