X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Frt3352.dtsi;h=a617281b751096319913cddf3f90be72cfc1a6b2;hb=190ee7d86b450083fea4236d588d0d88a50e1311;hp=db38b00e6353a2f255e34dbedb6bb4a272a8bc80;hpb=8cd1c997079246942680893adbd21d884e131b84;p=oweals%2Fopenwrt.git diff --git a/target/linux/ramips/dts/rt3352.dtsi b/target/linux/ramips/dts/rt3352.dtsi index db38b00e63..a617281b75 100644 --- a/target/linux/ramips/dts/rt3352.dtsi +++ b/target/linux/ramips/dts/rt3352.dtsi @@ -20,7 +20,13 @@ compatible = "mti,cpu-interrupt-controller"; }; - palmbus@10000000 { + aliases { + spi0 = &spi0; + spi1 = &spi1; + serial0 = &uartlite; + }; + + palmbus: palmbus@10000000 { compatible = "palmbus"; reg = <0x10000000 0x200000>; ranges = <0x0 0x10000000 0x1FFFFF>; @@ -28,12 +34,12 @@ #address-cells = <1>; #size-cells = <1>; - sysc@0 { + sysc: sysc@0 { compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc"; reg = <0x0 0x100>; }; - timer@100 { + timer: timer@100 { compatible = "ralink,rt3352-timer", "ralink,rt2880-timer"; reg = <0x100 0x20>; @@ -41,7 +47,7 @@ interrupts = <1>; }; - watchdog@120 { + watchdog: watchdog@120 { compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt"; reg = <0x120 0x10>; @@ -63,7 +69,7 @@ interrupts = <2>; }; - memc@300 { + memc: memc@300 { compatible = "ralink,rt3352-memc", "ralink,rt3050-memc"; reg = <0x300 0x100>; @@ -74,7 +80,7 @@ interrupts = <3>; }; - uart@500 { + uart: uart@500 { compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0x500 0x100>; @@ -132,7 +138,7 @@ #gpio-cells = <2>; ralink,gpio-base = <40>; - ralink,num-gpios = <12>; + ralink,num-gpios = <6>; ralink,register-map = [ 00 04 08 0c 10 14 18 1c 20 24 ]; @@ -140,22 +146,73 @@ status = "disabled"; }; - spi@b00 { + i2c@900 { + compatible = "ralink,rt2880-i2c"; + reg = <0x900 0x100>; + + resets = <&rstctrl 16>; + reset-names = "i2c"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins>; + }; + + i2s@a00 { + compatible = "ralink,rt3352-i2s"; + reg = <0xa00 0x100>; + + resets = <&rstctrl 17>; + reset-names = "i2s"; + + interrupt-parent = <&intc>; + interrupts = <10>; + + txdma-req = <2>; + rxdma-req = <3>; + + dmas = <&gdma 4>, + <&gdma 6>; + dma-names = "tx", "rx"; + + status = "disabled"; + }; + + spi0: spi@b00 { compatible = "ralink,rt3352-spi", "ralink,rt2880-spi"; - reg = <0xb00 0x100>; + reg = <0xb00 0x40>; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; resets = <&rstctrl 18>; reset-names = "spi"; - + pinctrl-names = "default"; pinctrl-0 = <&spi_pins>; status = "disabled"; }; - uartlite@c00 { + spi1: spi@b40 { + compatible = "ralink,rt3352-spi", "ralink,rt2880-spi"; + reg = <0xb40 0x60>; + #address-cells = <1>; + #size-cells = <0>; + + resets = <&rstctrl 18>; + reset-names = "spi"; + + pinctrl-names = "default"; + pinctrl-0 = <&spi_cs1>; + + status = "disabled"; + }; + + uartlite: uartlite@c00 { compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; @@ -170,9 +227,26 @@ pinctrl-names = "default"; pinctrl-0 = <&uartlite_pins>; }; + + gdma: gdma@2800 { + compatible = "ralink,rt3883-gdma"; + reg = <0x2800 0x800>; + + resets = <&rstctrl 14>; + reset-names = "dma"; + + interrupt-parent = <&intc>; + interrupts = <7>; + + #dma-cells = <1>; + #dma-channels = <16>; + #dma-requests = <16>; + + status = "disabled"; + }; }; - pinctrl { + pinctrl: pinctrl { compatible = "ralink,rt2880-pinmux"; pinctrl-names = "default"; @@ -181,12 +255,27 @@ state_default: pinctrl0 { }; + i2c_pins: i2c { + i2c { + ralink,group = "i2c"; + ralink,function = "i2c"; + }; + }; + spi_pins: spi { spi { ralink,group = "spi"; ralink,function = "spi"; }; }; + + spi_cs1: spi1 { + spi1 { + ralink,group = "spi_cs1"; + ralink,function = "spi_cs1"; + }; + }; + uartlite_pins: uartlite { uart { ralink,group = "uartlite"; @@ -200,25 +289,48 @@ #reset-cells = <1>; }; - ethernet@10100000 { + clkctrl: clkctrl { + compatible = "ralink,rt2880-clock"; + #clock-cells = <1>; + }; + + ethernet: ethernet@10100000 { compatible = "ralink,rt3352-eth", "ralink,rt3050-eth"; - reg = <0x10100000 10000>; + reg = <0x10100000 0x10000>; + + resets = <&rstctrl 21>; + reset-names = "fe"; interrupt-parent = <&cpuintc>; interrupts = <5>; + + mediatek,switch = <&esw>; }; - esw@10110000 { + esw: esw@10110000 { compatible = "ralink,rt3352-esw", "ralink,rt3050-esw"; - reg = <0x10110000 8000>; + reg = <0x10110000 0x8000>; + + resets = <&rstctrl 23>; + reset-names = "esw"; interrupt-parent = <&intc>; interrupts = <17>; }; - wmac@10180000 { + usbphy: usbphy { + compatible = "ralink,rt3352-usbphy"; + #phy-cells = <1>; + + resets = <&rstctrl 22 &rstctrl 25>; + reset-names = "host", "device"; + clocks = <&clkctrl 18 &clkctrl 20>; + clock-names = "host", "device"; + }; + + wmac: wmac@10180000 { compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac"; - reg = <0x10180000 40000>; + reg = <0x10180000 0x40000>; interrupt-parent = <&cpuintc>; interrupts = <6>; @@ -226,20 +338,26 @@ ralink,eeprom = "soc_wmac.eeprom"; }; - ehci@101c0000 { - compatible = "ralink,rt3352-ehci", "ehci-platform"; + ehci: ehci@101c0000 { + compatible = "generic-ehci"; reg = <0x101c0000 0x1000>; + phys = <&usbphy 1>; + phy-names = "usb"; + interrupt-parent = <&intc>; interrupts = <18>; status = "disabled"; }; - ohci@101c1000 { - compatible = "ralink,rt3352-ohci", "ohci-platform"; + ohci: ohci@101c1000 { + compatible = "generic-ohci"; reg = <0x101c1000 0x1000>; + phys = <&usbphy 1>; + phy-names = "usb"; + interrupt-parent = <&intc>; interrupts = <18>;