X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Frt3050.dtsi;h=dfce920b17bd82d849a8e2355b7b4b61e036e284;hb=3d6ba83fe4dd315531e47f53a58195b36ce96382;hp=a6996dc0cd820e66b7ac7e7d9f06cf188e59f777;hpb=770b28f146f7bf9495013a57504258d7f92263c4;p=oweals%2Fopenwrt.git

diff --git a/target/linux/ramips/dts/rt3050.dtsi b/target/linux/ramips/dts/rt3050.dtsi
index a6996dc0cd..dfce920b17 100644
--- a/target/linux/ramips/dts/rt3050.dtsi
+++ b/target/linux/ramips/dts/rt3050.dtsi
@@ -10,7 +10,7 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,57600 init=/init";
+		bootargs = "console=ttyS0,57600";
 	};
 
 	cpuintc: cpuintc@0 {
@@ -29,12 +29,12 @@
 		#size-cells = <1>;
 
 		sysc@0 {
-			compatible = "ralink,rt3052-sysc", "ralink,rt3050-sysc";
+			compatible = "ralink,rt3050-sysc";
 			reg = <0x0 0x100>;
 		};
 
 		timer@100 {
-			compatible = "ralink,rt3052-timer", "ralink,rt2880-timer";
+			compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
 			reg = <0x100 0x20>;
 
 			interrupt-parent = <&intc>;
@@ -42,14 +42,23 @@
 		};
 
 		watchdog@120 {
-			compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt";
+			compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
 			reg = <0x120 0x10>;
+
+			resets = <&rstctrl 8>;
+			reset-names = "wdt";
+
+			interrupt-parent = <&intc>;
+			interrupts = <1>;
 		};
 
 		intc: intc@200 {
-			compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
+			compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
 
+			resets = <&rstctrl 19>;
+			reset-names = "intc";
+
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
@@ -58,32 +67,59 @@
 		};
 
 		memc@300 {
-			compatible = "ralink,rt3052-memc", "ralink,rt3050-memc";
+			compatible = "ralink,rt3050-memc";
 			reg = <0x300 0x100>;
+
+			resets = <&rstctrl 20>;
+			reset-names = "mc";
+
+			interrupt-parent = <&intc>;
+			interrupts = <3>;
+		};
+
+		uart@500 {
+			compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
+			reg = <0x500 0x100>;
+
+			resets = <&rstctrl 12>;
+			reset-names = "uart";
+
+			interrupt-parent = <&intc>;
+			interrupts = <5>;
+
+			reg-shift = <2>;
+
+			status = "disabled";
 		};
 
 		gpio0: gpio@600 {
-			compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
+			compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
 			reg = <0x600 0x34>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
+			ralink,gpio-base = <0>;
 			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
 
-			status = "disabled";
+			resets = <&rstctrl 13>;
+			reset-names = "pio";
+
+			interrupt-parent = <&intc>;
+			interrupts = <6>;
 		};
 
 		gpio1: gpio@638 {
-			compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
+			compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
 			reg = <0x638 0x24>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
+			ralink,gpio-base = <24>;
 			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
@@ -93,12 +129,13 @@
 		};
 
 		gpio2: gpio@660 {
-			compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
+			compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
 			reg = <0x660 0x24>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
+			ralink,gpio-base = <40>;
 			ralink,num-gpios = <12>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
@@ -110,32 +147,75 @@
 		spi@b00 {
 			compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
 			reg = <0xb00 0x100>;
+
+			resets = <&rstctrl 18>;
+			reset-names = "spi";
+
 			#address-cells = <1>;
 			#size-cells = <0>;
 
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi_pins>;
+
 			status = "disabled";
 		};
 
 		uartlite@c00 {
-			compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
+			compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
 
+			resets = <&rstctrl 19>;
+			reset-names = "uartl";
+
 			interrupt-parent = <&intc>;
 			interrupts = <12>;
 
 			reg-shift = <2>;
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&uartlite_pins>;
 		};
 
 	};
 
+	pinctrl {
+		compatible = "ralink,rt2880-pinmux";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&state_default>;
+
+		state_default: pinctrl0 {
+			sdram {
+				ralink,group = "sdram";
+				ralink,function = "sdram";
+			};
+		};
+
+		spi_pins: spi {
+			spi {
+				ralink,group = "spi";
+				ralink,function = "spi";
+			};
+		};
+		uartlite_pins: uartlite {
+			uart {
+				ralink,group = "uartlite";
+				ralink,function = "uartlite";
+			};
+		};
+	};
+
+	rstctrl: rstctrl {
+		compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
+		#reset-cells = <1>;
+	};
+
 	ethernet@10100000 {
 		compatible = "ralink,rt3050-eth";
 		reg = <0x10100000 10000>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
-
-		status = "disabled";
 	};
 
 	esw@10110000 {
@@ -144,8 +224,6 @@
 
 		interrupt-parent = <&intc>;
 		interrupts = <17>;
-
-		status = "disabled";
 	};
 
 	wmac@10180000 {
@@ -155,18 +233,19 @@
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;
 
-		ralink,eeprom = "soc_wmac.eeprom"; 
-
-		status = "disabled";
+		ralink,eeprom = "soc_wmac.eeprom";
 	};
 
 	otg@101c0000 {
-		compatible = "ralink,rt3050-otg";
+		compatible = "ralink,rt3050-otg", "snps,dwc2";
 		reg = <0x101c0000 40000>;
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
+		resets = <&rstctrl 22>;
+		reset-names = "otg";
+
 		status = "disabled";
 	};
 };