X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Frt3050.dtsi;h=23da1c43ef6a2620b54ff52563a6ce0fb19fae2d;hb=ae3ac76e565724e188138dafe38ebeed122e2cf8;hp=e269c3a87619a1f2b643064a19363c28fa689b20;hpb=709b19ed9f331ff147bba6be9364b35754d8e710;p=oweals%2Fopenwrt.git diff --git a/target/linux/ramips/dts/rt3050.dtsi b/target/linux/ramips/dts/rt3050.dtsi index e269c3a876..23da1c43ef 100644 --- a/target/linux/ramips/dts/rt3050.dtsi +++ b/target/linux/ramips/dts/rt3050.dtsi @@ -13,6 +13,11 @@ bootargs = "console=ttyS0,57600"; }; + aliases { + spi0 = &spi0; + serial0 = &uartlite; + }; + cpuintc: cpuintc@0 { #address-cells = <0>; #interrupt-cells = <1>; @@ -20,7 +25,7 @@ compatible = "mti,cpu-interrupt-controller"; }; - palmbus@10000000 { + palmbus: palmbus@10000000 { compatible = "palmbus"; reg = <0x10000000 0x200000>; ranges = <0x0 0x10000000 0x1FFFFF>; @@ -28,28 +33,37 @@ #address-cells = <1>; #size-cells = <1>; - sysc@0 { - compatible = "ralink,rt3052-sysc", "ralink,rt3050-sysc"; + sysc: sysc@0 { + compatible = "ralink,rt3050-sysc"; reg = <0x0 0x100>; }; - timer@100 { - compatible = "ralink,rt3052-timer", "ralink,rt2880-timer"; + timer: timer@100 { + compatible = "ralink,rt3050-timer", "ralink,rt2880-timer"; reg = <0x100 0x20>; interrupt-parent = <&intc>; interrupts = <1>; }; - watchdog@120 { - compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt"; + watchdog: watchdog@120 { + compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt"; reg = <0x120 0x10>; + + resets = <&rstctrl 8>; + reset-names = "wdt"; + + interrupt-parent = <&intc>; + interrupts = <1>; }; intc: intc@200 { - compatible = "ralink,rt3052-intc", "ralink,rt2880-intc"; + compatible = "ralink,rt3050-intc", "ralink,rt2880-intc"; reg = <0x200 0x100>; + resets = <&rstctrl 19>; + reset-names = "intc"; + interrupt-controller; #interrupt-cells = <1>; @@ -57,33 +71,60 @@ interrupts = <2>; }; - memc@300 { - compatible = "ralink,rt3052-memc", "ralink,rt3050-memc"; + memc: memc@300 { + compatible = "ralink,rt3050-memc"; reg = <0x300 0x100>; + + resets = <&rstctrl 20>; + reset-names = "mc"; + + interrupt-parent = <&intc>; + interrupts = <3>; + }; + + uart: uart@500 { + compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a"; + reg = <0x500 0x100>; + + resets = <&rstctrl 12>; + reset-names = "uart"; + + interrupt-parent = <&intc>; + interrupts = <5>; + + reg-shift = <2>; + + status = "disabled"; }; gpio0: gpio@600 { - compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio"; + compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio"; reg = <0x600 0x34>; gpio-controller; #gpio-cells = <2>; + ralink,gpio-base = <0>; ralink,num-gpios = <24>; ralink,register-map = [ 00 04 08 0c 20 24 28 2c 30 34 ]; - status = "disabled"; + resets = <&rstctrl 13>; + reset-names = "pio"; + + interrupt-parent = <&intc>; + interrupts = <6>; }; gpio1: gpio@638 { - compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio"; + compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio"; reg = <0x638 0x24>; gpio-controller; #gpio-cells = <2>; + ralink,gpio-base = <24>; ralink,num-gpios = <16>; ralink,register-map = [ 00 04 08 0c 10 14 18 1c @@ -93,12 +134,13 @@ }; gpio2: gpio@660 { - compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio"; + compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio"; reg = <0x660 0x24>; gpio-controller; #gpio-cells = <2>; + ralink,gpio-base = <40>; ralink,num-gpios = <12>; ralink,register-map = [ 00 04 08 0c 10 14 18 1c @@ -107,66 +149,187 @@ status = "disabled"; }; - spi@b00 { + gdma: gdma@700 { + compatible = "ralink,rt305x-gdma"; + reg = <0x700 0x100>; + + resets = <&rstctrl 14>; + reset-names = "dma"; + + interrupt-parent = <&intc>; + interrupts = <7>; + + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <8>; + + status = "disabled"; + }; + + i2c@900 { + compatible = "ralink,rt2880-i2c"; + reg = <0x900 0x100>; + + resets = <&rstctrl 16>; + reset-names = "i2c"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins>; + }; + + i2s@a00 { + compatible = "ralink,rt3050-i2s"; + reg = <0xa00 0x100>; + + resets = <&rstctrl 17>; + reset-names = "i2s"; + + interrupt-parent = <&intc>; + interrupts = <10>; + + txdma-req = <2>; + + dmas = <&gdma 4>; + dma-names = "tx"; + + status = "disabled"; + }; + + spi0: spi@b00 { compatible = "ralink,rt3050-spi", "ralink,rt2880-spi"; reg = <0xb00 0x100>; + + resets = <&rstctrl 18>; + reset-names = "spi"; + #address-cells = <1>; #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi_pins>; + status = "disabled"; }; - uartlite@c00 { - compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a"; + uartlite: uartlite@c00 { + compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; + resets = <&rstctrl 19>; + reset-names = "uartl"; + interrupt-parent = <&intc>; interrupts = <12>; reg-shift = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&uartlite_pins>; + }; + }; + + pinctrl: pinctrl { + compatible = "ralink,rt2880-pinmux"; + + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinctrl0 { + sdram { + ralink,group = "sdram"; + ralink,function = "sdram"; + }; }; + i2c_pins: i2c { + i2c { + ralink,group = "i2c"; + ralink,function = "i2c"; + }; + }; + + spi_pins: spi { + spi { + ralink,group = "spi"; + ralink,function = "spi"; + }; + }; + + uartlite_pins: uartlite { + uart { + ralink,group = "uartlite"; + ralink,function = "uartlite"; + }; + }; }; - ethernet@10100000 { + rstctrl: rstctrl { + compatible = "ralink,rt3050-reset", "ralink,rt2880-reset"; + #reset-cells = <1>; + }; + + clkctrl: clkctrl { + compatible = "ralink,rt2880-clock"; + #clock-cells = <1>; + }; + + usbphy: usbphy { + compatible = "ralink,rt3050-usbphy"; + resets = <&rstctrl 22>; + reset-names = "host"; + clocks = <&clkctrl 18>; + clock-names = "host"; + }; + + ethernet: ethernet@10100000 { compatible = "ralink,rt3050-eth"; - reg = <0x10100000 10000>; + reg = <0x10100000 0x10000>; + + resets = <&rstctrl 21>; + reset-names = "fe"; interrupt-parent = <&cpuintc>; interrupts = <5>; - status = "disabled"; + mediatek,switch = <&esw>; }; - esw@10110000 { + esw: esw@10110000 { compatible = "ralink,rt3050-esw"; - reg = <0x10110000 8000>; + reg = <0x10110000 0x8000>; + + resets = <&rstctrl 23>; + reset-names = "esw"; interrupt-parent = <&intc>; interrupts = <17>; - - status = "disabled"; }; - wmac@10180000 { + wmac: wmac@10180000 { compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac"; - reg = <0x10180000 40000>; + reg = <0x10180000 0x40000>; interrupt-parent = <&cpuintc>; interrupts = <6>; - ralink,eeprom = "soc_wmac.eeprom"; - - status = "disabled"; + ralink,eeprom = "soc_wmac.eeprom"; }; - otg@101c0000 { - compatible = "ralink,rt3050-otg"; - reg = <0x101c0000 40000>; + otg: otg@101c0000 { + compatible = "ralink,rt3050-otg", "snps,dwc2"; + reg = <0x101c0000 0x40000>; interrupt-parent = <&intc>; interrupts = <18>; + resets = <&rstctrl 22>; + reset-names = "otg"; + status = "disabled"; }; };