X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Frt2880.dtsi;h=c6dfe9a32b6896d504b8cbb99b08bde14dfcdfa6;hb=4e31b2e8697c21f9bd6493bb3d78a4a41c6a9a52;hp=abf2271bc1e7215b4e4e932c23b21dd437411dd2;hpb=709b19ed9f331ff147bba6be9364b35754d8e710;p=oweals%2Fopenwrt.git diff --git a/target/linux/ramips/dts/rt2880.dtsi b/target/linux/ramips/dts/rt2880.dtsi index abf2271bc1..c6dfe9a32b 100644 --- a/target/linux/ramips/dts/rt2880.dtsi +++ b/target/linux/ramips/dts/rt2880.dtsi @@ -20,35 +20,37 @@ compatible = "mti,cpu-interrupt-controller"; }; - palmbus@10000000 { + palmbus@300000 { compatible = "palmbus"; - reg = <0x10000000 0x200000>; - ranges = <0x0 0x10000000 0x1FFFFF>; + reg = <0x300000 0x200000>; + ranges = <0x0 0x300000 0x1FFFFF>; #address-cells = <1>; #size-cells = <1>; - sysc@300000 { + sysc@0 { compatible = "ralink,rt2880-sysc"; - reg = <0x300000 0x100>; + reg = <0x000 0x100>; }; - timer@300100 { + timer@100 { compatible = "ralink,rt2880-timer"; - reg = <0x300100 0x20>; + reg = <0x100 0x20>; interrupt-parent = <&intc>; interrupts = <1>; + + status = "disabled"; }; - watchdog@300120 { + watchdog@120 { compatible = "ralink,rt2880-wdt"; - reg = <0x300120 0x10>; + reg = <0x120 0x10>; }; - intc: intc@300200 { + intc: intc@200 { compatible = "ralink,rt2880-intc"; - reg = <0x300200 0x100>; + reg = <0x200 0x100>; interrupt-controller; #interrupt-cells = <1>; @@ -57,58 +59,136 @@ interrupts = <2>; }; - memc@300300 { + memc@300 { compatible = "ralink,rt2880-memc"; - reg = <0x300300 0x100>; + reg = <0x300 0x100>; }; - gpio0: gpio@300600 { + gpio0: gpio@600 { compatible = "ralink,rt2880-gpio"; - reg = <0x300600 0x34>; + reg = <0x600 0x34>; gpio-controller; #gpio-cells = <2>; + ralink,gpio-base = <0>; ralink,num-gpios = <24>; ralink,register-map = [ 00 04 08 0c 20 24 28 2c 30 34 ]; }; - gpio1: gpio@300638 { + gpio1: gpio@638 { compatible = "ralink,rt2880-gpio"; - reg = <0x300638 0x24>; + reg = <0x638 0x24>; gpio-controller; #gpio-cells = <2>; + ralink,gpio-base = <24>; ralink,num-gpios = <16>; ralink,register-map = [ 00 04 08 0c 10 14 18 1c 20 24 ]; + + status = "disabled"; }; - gpio2: gpio@300660 { + gpio2: gpio@660 { compatible = "ralink,rt2880-gpio"; - reg = <0x300660 0x24>; + reg = <0x660 0x24>; gpio-controller; #gpio-cells = <2>; + ralink,gpio-base = <40>; ralink,num-gpios = <32>; ralink,register-map = [ 00 04 08 0c 10 14 18 1c 20 24 ]; + + status = "disabled"; }; - uartlite@300c00 { + uartlite@c00 { compatible = "ralink,rt2880-uart", "ns16550a"; - reg = <0x300c00 0x100>; + reg = <0xc00 0x100>; interrupt-parent = <&intc>; - interrupts = <12>; + interrupts = <8>; reg-shift = <2>; }; }; + + pinctrl { + compatible = "ralink,rt2880-pinmux"; + + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinctrl0 { + sdram { + ralink,group = "sdram"; + ralink,function = "sdram"; + }; + }; + + spi_pins: spi { + spi { + ralink,group = "spi"; + ralink,function = "spi"; + }; + }; + + uartlite_pins: uartlite { + uart { + ralink,group = "uartlite"; + ralink,function = "uartlite"; + }; + }; + }; + + rstctrl: rstctrl { + compatible = "ralink,rt2880-reset"; + #reset-cells = <1>; + }; + + ethernet@400000 { + compatible = "ralink,rt2880-eth"; + reg = <0x00400000 10000>; + + #address-cells = <1>; + #size-cells = <0>; + + resets = <&rstctrl 18>; + reset-names = "fe"; + + interrupt-parent = <&cpuintc>; + interrupts = <5>; + + status = "disabled"; + + port@0 { + compatible = "ralink,rt2880-port", "ralink,eth-port"; + reg = <0>; + }; + + mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + }; + + wmac@480000 { + compatible = "ralink,rt2880-wmac"; + reg = <0x480000 40000>; + + interrupt-parent = <&cpuintc>; + interrupts = <6>; + + ralink,eeprom = "soc_wmac.eeprom"; + }; };