X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Frt2880.dtsi;h=646cb6a99143abdc340e0092a2b2aaa22888cefa;hb=d04cab8dfc8340b530363c6afc99c86dccb075d1;hp=637409f355732a69697a6ddaef3c6435c6e475df;hpb=338ff04cab083fd64faaac4d97814e7d15392d3a;p=oweals%2Fopenwrt.git

diff --git a/target/linux/ramips/dts/rt2880.dtsi b/target/linux/ramips/dts/rt2880.dtsi
index 637409f355..646cb6a991 100644
--- a/target/linux/ramips/dts/rt2880.dtsi
+++ b/target/linux/ramips/dts/rt2880.dtsi
@@ -13,10 +13,6 @@
 		bootargs = "console=ttyS0,57600";
 	};
 
-	memorydetect {
-		ralink,memory = <0x8000000 0x200000 0x8000000>;
-	};
-
 	cpuintc: cpuintc@0 {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
@@ -125,15 +121,51 @@
 		};
 	};
 
+	pinctrl {
+		compatible = "ralink,rt2880-pinmux";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&state_default>;
+
+		state_default: pinctrl0 {
+			sdram {
+				ralink,group = "sdram";
+				ralink,function = "sdram";
+			};
+		};
+
+		spi_pins: spi {
+			spi {
+				ralink,group = "spi";
+				ralink,function = "spi";
+			};
+		};
+
+		uartlite_pins: uartlite {
+			uart {
+				ralink,group = "uartlite";
+				ralink,function = "uartlite";
+			};
+		};
+	};
+
 	ethernet@400000 {
 		compatible = "ralink,rt2880-eth";
 		reg = <0x00400000 10000>;
 
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
 
 		status = "disabled";
 
+		port@0 {
+			compatible = "ralink,rt2880-port", "ralink,eth-port";
+			reg = <0>;
+		};
+
 		mdio-bus {
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -150,8 +182,6 @@
 		interrupts = <6>;
 
 		ralink,eeprom = "soc_wmac.eeprom";
-
-		status = "disabled";
 	};
 
 };