X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7620n.dtsi;h=a3132b8a598f1fc1ca0db215ac895ff042b64349;hb=c550ad3d3a70b409a482896a77cfc890823d0221;hp=b1586ec07358b680f537e846e11c355070de8bdc;hpb=948e67cb16f01b7d607154c296bc1068ea12ee88;p=oweals%2Fopenwrt.git

diff --git a/target/linux/ramips/dts/mt7620n.dtsi b/target/linux/ramips/dts/mt7620n.dtsi
index b1586ec073..a3132b8a59 100644
--- a/target/linux/ramips/dts/mt7620n.dtsi
+++ b/target/linux/ramips/dts/mt7620n.dtsi
@@ -20,6 +20,11 @@
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
+	aliases {
+		spi0 = &spi0;
+		spi1 = &spi1;
+	};
+
 	palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
@@ -154,9 +159,9 @@
 			status = "disabled";
 		};
 
-		spi@b00 {
+		spi0: spi@b00 {
 			compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
-			reg = <0xb00 0x100>;
+			reg = <0xb00 0x40>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
@@ -170,6 +175,22 @@
 			pinctrl-0 = <&spi_pins>;
 		};
 
+		spi1: spi@b40 {
+			compatible = "ralink,rt2880-spi";
+			reg = <0xb40 0x60>;
+
+			resets = <&rstctrl 18>;
+			reset-names = "spi";
+
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			status = "disabled";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi_cs1>;
+		};
+
 		uartlite@c00 {
 			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
@@ -213,6 +234,13 @@
 			};
 		};
 
+		spi_cs1: spi1 {
+			spi1 {
+				ralink,group = "spi_cs1";
+				ralink,function = "spi_cs1";
+			};
+		};
+
 		uartlite_pins: uartlite {
 			uart {
 				ralink,group = "uartlite";