X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7620a.dtsi;h=96966b464706edb963bff00e6365b7d643183493;hb=05912a304c1d3f31f350cd708fe4722389ec835a;hp=352b2d1188cdb6ade235404d00f581acf03a4779;hpb=9195d8da355d0d141ac02c9a5269452dc64ffd2d;p=oweals%2Fopenwrt.git diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi index 352b2d1188..96966b4647 100644 --- a/target/linux/ramips/dts/mt7620a.dtsi +++ b/target/linux/ramips/dts/mt7620a.dtsi @@ -176,7 +176,7 @@ }; i2c: i2c@900 { - compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c"; + compatible = "ralink,rt2880-i2c"; reg = <0x900 0x100>; resets = <&rstctrl 16>; @@ -192,7 +192,7 @@ }; i2s: i2s@a00 { - compatible = "ralink,mt7620a-i2s"; + compatible = "mediatek,mt7620-i2s"; reg = <0xa00 0x100>; resets = <&rstctrl 17>; @@ -201,8 +201,11 @@ interrupt-parent = <&intc>; interrupts = <10>; + txdma-req = <2>; + rxdma-req = <3>; + dmas = <&gdma 4>, - <&gdma 5>; + <&gdma 6>; dma-names = "tx", "rx"; status = "disabled"; @@ -232,7 +235,7 @@ reset-names = "spi"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; status = "disabled"; @@ -281,7 +284,7 @@ }; gdma: gdma@2800 { - compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma"; + compatible = "ralink,mt7620a-gdma", "ralink,rt3883-gdma"; reg = <0x2800 0x800>; resets = <&rstctrl 14>; @@ -320,6 +323,13 @@ }; }; + gpio_i2s_pins: gpio_i2s { + gpio_i2s { + ralink,group = "uartf"; + ralink,function = "gpio i2s"; + }; + }; + spi_pins: spi { spi { ralink,group = "spi"; @@ -396,12 +406,20 @@ #reset-cells = <1>; }; + clkctrl: clkctrl { + compatible = "ralink,rt2880-clock"; + #clock-cells = <1>; + }; + usbphy: usbphy { compatible = "mediatek,mt7620-usbphy"; #phy-cells = <1>; resets = <&rstctrl 22 &rstctrl 25>; reset-names = "host", "device"; + + clocks = <&clkctrl 22 &clkctrl 25>; + clock-names = "host", "device"; }; ethernet: ethernet@10100000 { @@ -499,6 +517,9 @@ resets = <&rstctrl 26>; reset-names = "pcie0"; + clocks = <&clkctrl 26>; + clock-names = "pcie0"; + interrupt-parent = <&cpuintc>; interrupts = <4>;