X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=target%2Flinux%2Fath79%2Fpatches-4.14%2F0009-MIPS-ath79-add-lots-of-missing-registers.patch;h=d1755394fae95963dcc76fa4170bba862a896ae5;hb=10f8823254a6bf96a09a00a73e138a0da226040f;hp=5963ee8991ea68752829882e449a3cd4f9c37d20;hpb=e2aa0c3f8b49f62fc83ec90f0bc5a67560fffa73;p=oweals%2Fopenwrt.git diff --git a/target/linux/ath79/patches-4.14/0009-MIPS-ath79-add-lots-of-missing-registers.patch b/target/linux/ath79/patches-4.14/0009-MIPS-ath79-add-lots-of-missing-registers.patch index 5963ee8991..d1755394fa 100644 --- a/target/linux/ath79/patches-4.14/0009-MIPS-ath79-add-lots-of-missing-registers.patch +++ b/target/linux/ath79/patches-4.14/0009-MIPS-ath79-add-lots-of-missing-registers.patch @@ -156,7 +156,7 @@ Signed-off-by: John Crispin /* * PLL block */ -@@ -166,8 +260,14 @@ +@@ -166,9 +260,15 @@ #define AR71XX_AHB_DIV_SHIFT 20 #define AR71XX_AHB_DIV_MASK 0x7 @@ -164,14 +164,14 @@ Signed-off-by: John Crispin +#define AR71XX_ETH1_PLL_SHIFT 19 + #define AR724X_PLL_REG_CPU_CONFIG 0x00 --#define AR724X_PLL_REG_PCIE_CONFIG 0x18 -+#define AR724X_PLL_REG_PCIE_CONFIG 0x10 -+ + #define AR724X_PLL_REG_PCIE_CONFIG 0x10 + +#define AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS BIT(16) +#define AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET BIT(25) - ++ #define AR724X_PLL_FB_SHIFT 0 #define AR724X_PLL_FB_MASK 0x3ff + #define AR724X_PLL_REF_DIV_SHIFT 10 @@ -178,6 +278,8 @@ #define AR724X_DDR_DIV_SHIFT 22 #define AR724X_DDR_DIV_MASK 0x3