X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=target%2Flinux%2Far71xx%2Fpatches-4.4%2F620-MIPS-ath79-add-support-for-QCA953x-SoC.patch;h=777f7b2c8838f2c93f79d5d5212f90b2bd82ced3;hb=d2b6bf141662429d542b23e9e8f44245a77710a5;hp=4590a9b9d49fa61d07441abf06d3f9ca765fea90;hpb=9213fefb4dafe08b6b3e4f341581d18d520f7228;p=oweals%2Fopenwrt.git

diff --git a/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch
index 4590a9b9d4..777f7b2c88 100644
--- a/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch
+++ b/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch
@@ -22,7 +22,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
 
 --- a/arch/mips/ath79/Kconfig
 +++ b/arch/mips/ath79/Kconfig
-@@ -117,6 +117,10 @@ config SOC_AR934X
+@@ -116,6 +116,10 @@ config SOC_AR934X
  	select PCI_AR724X if PCI
  	def_bool n
  
@@ -33,7 +33,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
  config SOC_QCA955X
  	select HW_HAS_PCI
  	select PCI_AR724X if PCI
-@@ -156,7 +160,7 @@ config ATH79_DEV_USB
+@@ -155,7 +159,7 @@ config ATH79_DEV_USB
  	def_bool n
  
  config ATH79_DEV_WMAC
@@ -147,7 +147,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
  	else
 --- a/arch/mips/ath79/common.c
 +++ b/arch/mips/ath79/common.c
-@@ -104,6 +104,8 @@ void ath79_device_reset_set(u32 mask)
+@@ -103,6 +103,8 @@ void ath79_device_reset_set(u32 mask)
  		reg = AR933X_RESET_REG_RESET_MODULE;
  	else if (soc_is_ar934x())
  		reg = AR934X_RESET_REG_RESET_MODULE;
@@ -156,7 +156,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
  	else if (soc_is_qca955x())
  		reg = QCA955X_RESET_REG_RESET_MODULE;
  	else
-@@ -132,6 +134,8 @@ void ath79_device_reset_clear(u32 mask)
+@@ -131,6 +133,8 @@ void ath79_device_reset_clear(u32 mask)
  		reg = AR933X_RESET_REG_RESET_MODULE;
  	else if (soc_is_ar934x())
  		reg = AR934X_RESET_REG_RESET_MODULE;
@@ -285,7 +285,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
  	else
 --- a/arch/mips/ath79/early_printk.c
 +++ b/arch/mips/ath79/early_printk.c
-@@ -114,6 +114,8 @@ static void prom_putchar_init(void)
+@@ -116,6 +116,8 @@ static void prom_putchar_init(void)
  	case REV_ID_MAJOR_AR9341:
  	case REV_ID_MAJOR_AR9342:
  	case REV_ID_MAJOR_AR9344:
@@ -335,10 +335,10 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
 +	status = ath79_reset_rr(QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS);
 +
 +	if (status & QCA953X_PCIE_WMAC_INT_PCIE_ALL) {
-+		ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_PCIE);
++		ath79_ddr_wb_flush(3);
 +		generic_handle_irq(ATH79_IP2_IRQ(0));
 +	} else if (status & QCA953X_PCIE_WMAC_INT_WMAC_ALL) {
-+		ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_WMAC);
++		ath79_ddr_wb_flush(4);
 +		generic_handle_irq(ATH79_IP2_IRQ(1));
 +	} else {
 +		spurious_interrupt();