X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=post%2Flib_powerpc%2Fcpu_asm.h;h=b5c588919e76186703005f41ff8df019cb1b7d2e;hb=66a7a2464870700b17d7235ff247c45d705ed5f7;hp=ef6fe61eff9c2be2ca6f9f28f5dd99880cb3af0f;hpb=9d62f20d0861ef87460d073dc189c851715b46ae;p=oweals%2Fu-boot.git

diff --git a/post/lib_powerpc/cpu_asm.h b/post/lib_powerpc/cpu_asm.h
index ef6fe61eff..b5c588919e 100644
--- a/post/lib_powerpc/cpu_asm.h
+++ b/post/lib_powerpc/cpu_asm.h
@@ -2,23 +2,7 @@
  * (C) Copyright 2002
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 #ifndef _CPU_ASM_H
 #define _CPU_ASM_H
@@ -128,64 +112,64 @@
 
 #define ASM_0(opcode)			(opcode)
 #define ASM_1(opcode, rd)		((opcode) +		\
-	                                 ((rd) << 21))
+					 ((rd) << 21))
 #define ASM_1C(opcode, cr)		((opcode) +		\
-	                                 ((cr) << 23))
+					 ((cr) << 23))
 #define ASM_11(opcode, rd, rs)		((opcode) +		\
-	                                 ((rd) << 21) +		\
+					 ((rd) << 21) +		\
 					 ((rs) << 16))
 #define ASM_11C(opcode, cd, cs)		((opcode) +		\
-	                                 ((cd) << 23) +		\
+					 ((cd) << 23) +		\
 					 ((cs) << 18))
 #define ASM_11X(opcode, rd, rs)		((opcode) +		\
-	                                 ((rs) << 21) +		\
+					 ((rs) << 21) +		\
 					 ((rd) << 16))
 #define ASM_11I(opcode, rd, rs, simm)	((opcode) +		\
-	                                 ((rd) << 21) +		\
+					 ((rd) << 21) +		\
 					 ((rs) << 16) +		\
 					 ((simm) & 0xffff))
 #define ASM_11IF(opcode, rd, rs, simm)	((opcode) +		\
-	                                 ((rd) << 21) +		\
+					 ((rd) << 21) +		\
 					 ((rs) << 16) +		\
 					 ((simm) << 11))
 #define ASM_11S(opcode, rd, rs, sh)	((opcode) +		\
-	                                 ((rs) << 21) +		\
+					 ((rs) << 21) +		\
 					 ((rd) << 16) +		\
 					 ((sh) << 11))
 #define ASM_11IX(opcode, rd, rs, imm)	((opcode) +		\
-	                                 ((rs) << 21) +		\
+					 ((rs) << 21) +		\
 					 ((rd) << 16) +		\
 					 ((imm) & 0xffff))
 #define ASM_12(opcode, rd, rs1, rs2)	((opcode) +		\
-	                                 ((rd) << 21) +		\
+					 ((rd) << 21) +		\
 					 ((rs1) << 16) +	\
 					 ((rs2) << 11))
 #define ASM_12F(opcode, fd, fs1, fs2)	((opcode) +		\
-	                                 ((fd) << 21) +		\
+					 ((fd) << 21) +		\
 					 ((fs1) << 16) +	\
 					 ((fs2) << 11))
 #define ASM_12X(opcode, rd, rs1, rs2)	((opcode) +		\
-	                                 ((rs1) << 21) +	\
+					 ((rs1) << 21) +	\
 					 ((rd) << 16) +		\
 					 ((rs2) << 11))
 #define ASM_2C(opcode, cr, rs1, rs2)	((opcode) +		\
-	                                 ((cr) << 23) +		\
+					 ((cr) << 23) +		\
 					 ((rs1) << 16) +	\
 					 ((rs2) << 11))
 #define ASM_1IC(opcode, cr, rs, imm)	((opcode) +		\
-	                                 ((cr) << 23) +		\
+					 ((cr) << 23) +		\
 					 ((rs) << 16) +		\
 					 ((imm) & 0xffff))
 #define ASM_122(opcode, rd, rs1, rs2, imm1, imm2)		\
 					((opcode) +		\
-	                                 ((rs1) << 21) +	\
+					 ((rs1) << 21) +	\
 					 ((rd) << 16) +		\
 					 ((rs2) << 11) +	\
 					 ((imm1) << 6) +	\
 					 ((imm2) << 1))
 #define ASM_113(opcode, rd, rs, imm1, imm2, imm3)		\
 					((opcode) +		\
-	                                 ((rs) << 21) +		\
+					 ((rs) << 21) +		\
 					 ((rd) << 16) +		\
 					 ((imm1) << 11) +	\
 					 ((imm2) << 6) +	\