X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=lib_blackfin%2Fstring.c;h=12b6d24058c169013f126f58edd3f8213059cf91;hb=156feb90d200f186cdfd856d7f6f1878bb1bec1e;hp=2a56910affa2632292002594fc8b8b08c74753d0;hpb=21d631360430cf0ae9099612273cd4de28911ba9;p=oweals%2Fu-boot.git

diff --git a/lib_blackfin/string.c b/lib_blackfin/string.c
index 2a56910aff..12b6d24058 100644
--- a/lib_blackfin/string.c
+++ b/lib_blackfin/string.c
@@ -136,6 +136,16 @@ int strncmp(const char *cs, const char *ct, size_t count)
  */
 void dma_memcpy_nocache(void *dst, const void *src, size_t count)
 {
+	uint16_t wdsize, mod;
+
+	/* Disable DMA in case it's still running (older u-boot's did not
+	 * always turn them off).  Do it before the if statement below so
+	 * we can be cheap and not do a SSYNC() due to the forced abort.
+	 */
+	bfin_write_MDMA_D0_CONFIG(0);
+	bfin_write_MDMA_S0_CONFIG(0);
+	bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR);
+
 	/* Scratchpad cannot be a DMA source or destination */
 	if (((unsigned long)src >= L1_SRAM_SCRATCH &&
 	     (unsigned long)src < L1_SRAM_SCRATCH_END) ||
@@ -143,9 +153,18 @@ void dma_memcpy_nocache(void *dst, const void *src, size_t count)
 	     (unsigned long)dst < L1_SRAM_SCRATCH_END))
 		hang();
 
-	bfin_write_MDMA_S0_CONFIG(0);
-	bfin_write_MDMA_D0_CONFIG(0);
-	bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR);
+	if (((unsigned long)dst | (unsigned long)src | count) & 0x1) {
+		wdsize = WDSIZE_8;
+		mod = 1;
+	} else if (((unsigned long)dst | (unsigned long)src | count) & 0x2) {
+		wdsize = WDSIZE_16;
+		count >>= 1;
+		mod = 2;
+	} else {
+		wdsize = WDSIZE_32;
+		count >>= 2;
+		mod = 4;
+	}
 
 	/* Copy sram functions from sdram to sram */
 	/* Setup destination start address */
@@ -153,41 +172,43 @@ void dma_memcpy_nocache(void *dst, const void *src, size_t count)
 	/* Setup destination xcount */
 	bfin_write_MDMA_D0_X_COUNT(count);
 	/* Setup destination xmodify */
-	bfin_write_MDMA_D0_X_MODIFY(1);
+	bfin_write_MDMA_D0_X_MODIFY(mod);
 
 	/* Setup Source start address */
 	bfin_write_MDMA_S0_START_ADDR(src);
 	/* Setup Source xcount */
 	bfin_write_MDMA_S0_X_COUNT(count);
 	/* Setup Source xmodify */
-	bfin_write_MDMA_S0_X_MODIFY(1);
+	bfin_write_MDMA_S0_X_MODIFY(mod);
 
 	/* Enable source DMA */
-	bfin_write_MDMA_S0_CONFIG(DMAEN);
-
-	bfin_write_MDMA_D0_CONFIG(WNR | DMAEN);
+	bfin_write_MDMA_S0_CONFIG(wdsize | DMAEN);
+	bfin_write_MDMA_D0_CONFIG(wdsize | DMAEN | WNR | DI_EN);
 	SSYNC();
 
-	while (bfin_read_MDMA_D0_IRQ_STATUS() & DMA_RUN)
+	while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
 		continue;
 
-	bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_RUN | DMA_DONE | DMA_ERR);
+	bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR);
 	bfin_write_MDMA_D0_CONFIG(0);
 	bfin_write_MDMA_S0_CONFIG(0);
 }
+/* We should do a dcache invalidate on the destination after the dma, but since
+ * we lack such hardware capability, we'll flush/invalidate the destination
+ * before the dma and bank on the idea that u-boot is single threaded.
+ */
 void *dma_memcpy(void *dst, const void *src, size_t count)
 {
-	if (dcache_status())
+	if (dcache_status()) {
 		blackfin_dcache_flush_range(src, src + count);
+		blackfin_dcache_flush_invalidate_range(dst, dst + count);
+	}
 
 	dma_memcpy_nocache(dst, src, count);
 
 	if (icache_status())
 		blackfin_icache_flush_range(dst, dst + count);
 
-	if (dcache_status())
-		blackfin_dcache_invalidate_range(dst, dst + count);
-
 	return dst;
 }