X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fzynqmppl.h;h=a0a52ec4c1d355521cc51a30ed446f739f6a001e;hb=0e69bcfb27644f9e7c575aa3565bcff922c7dec2;hp=542ace9a03b9b6d9262bc64b0191c758e28cb500;hpb=cbe7706ab8aab06c18edaa9b120371f9c8012728;p=oweals%2Fu-boot.git diff --git a/include/zynqmppl.h b/include/zynqmppl.h index 542ace9a03..a0a52ec4c1 100644 --- a/include/zynqmppl.h +++ b/include/zynqmppl.h @@ -1,21 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * (C) Copyright 2015 Xilinx, Inc, * Michal Simek - * - * SPDX-License-Identifier: GPL-2.0 */ #ifndef _ZYNQMPPL_H_ #define _ZYNQMPPL_H_ #include +#include #define ZYNQMP_SIP_SVC_CSU_DMA_CHIPID 0xC2000018 #define ZYNQMP_SIP_SVC_PM_FPGA_LOAD 0xC2000016 +#define ZYNQMP_SIP_SVC_PM_FPGA_STATUS 0xC2000017 #define ZYNQMP_FPGA_OP_INIT (1 << 0) #define ZYNQMP_FPGA_OP_LOAD (1 << 1) #define ZYNQMP_FPGA_OP_DONE (1 << 2) +#define ZYNQMP_FPGA_FLAG_AUTHENTICATED BIT(2) +#define ZYNQMP_FPGA_FLAG_ENCRYPTED BIT(3) + +#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT 15 +#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK (0xf << \ + ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT) +#define ZYNQMP_CSU_IDCODE_SVD_SHIFT 12 +#define ZYNQMP_CSU_IDCODE_SVD_MASK (0x7 << ZYNQMP_CSU_IDCODE_SVD_SHIFT) + extern struct xilinx_fpga_op zynqmp_op; #define XILINX_ZYNQMP_DESC \