X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Ffsl_mdio.h;h=b87346ce7ca1a401fb03b79236c059c0b836bf68;hb=14b254b5f5a841e1227e3667cf94fbcdadaf720e;hp=b58713d896f445e435ecd329e63953e2642f4ef4;hpb=a891601ce51edbafa1a2750c96a618e4fcbca1c2;p=oweals%2Fu-boot.git diff --git a/include/fsl_mdio.h b/include/fsl_mdio.h index b58713d896..b87346ce7c 100644 --- a/include/fsl_mdio.h +++ b/include/fsl_mdio.h @@ -1,24 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2009-2012, 2013 Freescale Semiconductor, Inc. * Jun-jie Zhang * Mingkai Hu - * - * SPDX-License-Identifier: GPL-2.0+ */ + #ifndef __FSL_PHY_H__ #define __FSL_PHY_H__ #include #include -#include + +struct tsec_mii_mng { + u32 miimcfg; /* MII management configuration reg */ + u32 miimcom; /* MII management command reg */ + u32 miimadd; /* MII management address reg */ + u32 miimcon; /* MII management control reg */ + u32 miimstat; /* MII management status reg */ + u32 miimind; /* MII management indication reg */ + u32 ifstat; /* Interface Status Register */ +}; + +int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc); /* PHY register offsets */ #define PHY_EXT_PAGE_ACCESS 0x1f /* MII Management Configuration Register */ -#define MIIMCFG_RESET_MGMT 0x80000000 -#define MIIMCFG_MGMT_CLOCK_SELECT 0x00000007 -#define MIIMCFG_INIT_VALUE 0x00000003 +#define MIIMCFG_RESET_MGMT 0x80000000 +#define MIIMCFG_MGMT_CLOCK_SELECT 0x00000007 +#define MIIMCFG_INIT_VALUE 0x00000003 /* MII Management Command Register */ #define MIIMCOM_READ_CYCLE 0x00000001