X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Ffsl_mdio.h;h=8857d50910e7672d5d146ae603f6d3eb7275757a;hb=915f15ac5746739da0aa2ee2840c2d00dc65aaaa;hp=b58713d896f445e435ecd329e63953e2642f4ef4;hpb=5be00a0164892eb695fefa41fb24258072ee2185;p=oweals%2Fu-boot.git

diff --git a/include/fsl_mdio.h b/include/fsl_mdio.h
index b58713d896..8857d50910 100644
--- a/include/fsl_mdio.h
+++ b/include/fsl_mdio.h
@@ -1,24 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2009-2012, 2013 Freescale Semiconductor, Inc.
  *	Jun-jie Zhang <b18070@freescale.com>
  *	Mingkai Hu <Mingkai.hu@freescale.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
+
 #ifndef __FSL_PHY_H__
 #define __FSL_PHY_H__
 
 #include <net.h>
 #include <miiphy.h>
-#include <asm/fsl_enet.h>
+
+struct tsec_mii_mng {
+	u32 miimcfg;		/* MII management configuration reg */
+	u32 miimcom;		/* MII management command reg */
+	u32 miimadd;		/* MII management address reg */
+	u32 miimcon;		/* MII management control reg */
+	u32 miimstat;		/* MII management status reg  */
+	u32 miimind;		/* MII management indication reg */
+	u32 ifstat;		/* Interface Status Register */
+};
+
+int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc);
 
 /* PHY register offsets */
 #define PHY_EXT_PAGE_ACCESS	0x1f
 
 /* MII Management Configuration Register */
-#define MIIMCFG_RESET_MGMT          0x80000000
-#define MIIMCFG_MGMT_CLOCK_SELECT   0x00000007
-#define MIIMCFG_INIT_VALUE	    0x00000003
+#define MIIMCFG_RESET_MGMT		0x80000000
+#define MIIMCFG_MGMT_CLOCK_SELECT	0x00000007
+#define MIIMCFG_INIT_VALUE		0x00000003
 
 /* MII Management Command Register */
 #define MIIMCOM_READ_CYCLE	0x00000001
@@ -42,6 +53,7 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr,
 		int regnum, u16 value);
 int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr,
 		int regnum);
+int memac_mdio_reset(struct mii_dev *bus);
 
 struct fsl_pq_mdio_info {
 	struct tsec_mii_mng __iomem *regs;