X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fdwmmc.h;h=f06720dc0d98eecc1f343b0362141899ebb1cf6c;hb=24b77393a5fcc3e1f51b4e3a1080c0efb60b52eb;hp=5b9602cd05c4a627c16513c3721c8bb492dea731;hpb=2863a9bfc29092be37f8beee230883367b057065;p=oweals%2Fu-boot.git

diff --git a/include/dwmmc.h b/include/dwmmc.h
index 5b9602cd05..f06720dc0d 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2012 SAMSUNG Electronics
  * Jaehoon Chung <jh80.chung@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __DWMMC_HW_H
@@ -57,6 +56,7 @@
 #define DWMCI_INTMSK_DTO	(1 << 3)
 #define DWMCI_INTMSK_TXDR	(1 << 4)
 #define DWMCI_INTMSK_RXDR	(1 << 5)
+#define DWMCI_INTMSK_RCRC	(1 << 6)
 #define DWMCI_INTMSK_DCRC	(1 << 7)
 #define DWMCI_INTMSK_RTO	(1 << 8)
 #define DWMCI_INTMSK_DRTO	(1 << 9)
@@ -104,6 +104,8 @@
 #define DWMCI_CTYPE_8BIT	(1 << 16)
 
 /* Status Register */
+#define DWMCI_FIFO_EMPTY	(1 << 2)
+#define DWMCI_FIFO_FULL		(1 << 3)
 #define DWMCI_BUSY		(1 << 9)
 #define DWMCI_FIFO_MASK		0x1fff
 #define DWMCI_FIFO_SHIFT	17
@@ -128,6 +130,13 @@
 /* UHS register */
 #define DWMCI_DDR_MODE	(1 << 16)
 
+/* Internal IDMAC interrupt defines */
+#define DWMCI_IDINTEN_RI		BIT(1)
+#define DWMCI_IDINTEN_TI		BIT(0)
+
+#define DWMCI_IDINTEN_MASK	(DWMCI_IDINTEN_TI | \
+				 DWMCI_IDINTEN_RI)
+
 /* quirks */
 #define DWMCI_QUIRK_DISABLE_SMU		(1 << 0)
 
@@ -253,14 +262,12 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg)
  * See rockchip_dw_mmc.c for an example.
  *
  * @cfg:	Configuration structure to fill in (generally &plat->mmc)
- * @name:	Device name (normally dev->name)
- * @buswidth:	Bus width (in bits, such as 4 or 8)
- * @caps:	Host capabilities (MMC_MODE_...)
+ * @host:	DWMMC host
  * @max_clk:	Maximum supported clock speed in HZ (e.g. 150000000)
  * @min_clk:	Minimum supported clock speed in HZ (e.g. 400000)
  */
-void dwmci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
-		     uint caps, u32 max_clk, u32 min_clk);
+void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host,
+		u32 max_clk, u32 min_clk);
 
 /**
  * dwmci_bind() - Set up a new MMC block device
@@ -293,7 +300,7 @@ int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg);
 int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk);
 #endif /* !CONFIG_BLK */
 
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
 /* Export the operations to drivers */
 int dwmci_probe(struct udevice *dev);
 extern const struct dm_mmc_ops dm_dwmci_ops;