X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fti_armv7_omap.h;h=727c6483193a0a740e9dd29ca19aead7710304e3;hb=406df85345f942d9348443983d81a01e013e920b;hp=306f503d9e9d792163faa780be92012f691501a7;hpb=c1b62ba9ca0e41fdd548cb3bb9af3b3f90d4a393;p=oweals%2Fu-boot.git

diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h
index 306f503d9e..727c648319 100644
--- a/include/configs/ti_armv7_omap.h
+++ b/include/configs/ti_armv7_omap.h
@@ -1,10 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * ti_armv7_omap.h
  *
  * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
  *
- * SPDX-License-Identifier:	GPL-2.0+
- *
  * The various ARMv7 SoCs from TI all share a number of IP blocks when
  * implementing a given feature. This is meant to isolate the features
  * that are based on OMAP architecture.
@@ -12,16 +11,11 @@
 #ifndef __CONFIG_TI_ARMV7_OMAP_H__
 #define __CONFIG_TI_ARMV7_OMAP_H__
 
-/* I2C IP block */
-#define CONFIG_SYS_OMAP24_I2C_SPEED	100000
-#define CONFIG_SYS_OMAP24_I2C_SLAVE	1
-
 /*
  * GPMC NAND block.  We support 1 device and the physical address to
  * access CS0 at is 0x8000000.
  */
-#ifdef CONFIG_NAND
-#define CONFIG_NAND_OMAP_GPMC
+#ifdef CONFIG_MTD_RAW_NAND
 #ifndef CONFIG_SYS_NAND_BASE
 #define CONFIG_SYS_NAND_BASE		0x8000000
 #endif