X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fti_armv7_keystone2.h;h=b632ae010d81905694dfc9a4315505195b8fb435;hb=807f0ff68a9afe9667745d18e647e5ef2231520f;hp=7fb3aaf46d6ee18c8e24baba2f6b36b24f98b59a;hpb=c4cb6e64bf068eaa1f7c96cb37da7ae6d40bbbff;p=oweals%2Fu-boot.git

diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 7fb3aaf46d..b632ae010d 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -1,10 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Common configuration header file for all Keystone II EVM platforms
  *
  * (C) Copyright 2012-2014
  *     Texas Instruments Incorporated, <www.ti.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #ifndef __CONFIG_KS2_EVM_H
@@ -16,19 +15,12 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is a 2nd stage loader */
 
 /* SoC Configuration */
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_SYS_ARCH_TIMER
-#ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE		0x0c000000
-#endif
 #define CONFIG_SPL_TARGET		"u-boot-spi.gph"
-#define CONFIG_SYS_DCACHE_OFF
 
 /* Memory Configuration */
-#define CONFIG_NR_DRAM_BANKS		2
 #define CONFIG_SYS_LPAE_SDRAM_BASE	0x800000000
 #define CONFIG_MAX_RAM_BANK_SIZE	(2 << 30)       /* 2GB */
-#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SPL_TEXT_BASE - \
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_ISW_ENTRY_ADDR - \
 					GENERATED_GBL_DATA_SIZE)
 
 #ifdef CONFIG_SYS_MALLOC_F_LEN
@@ -40,7 +32,7 @@
 /* SPL SPI Loader Configuration */
 #define CONFIG_SPL_PAD_TO		65536
 #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_PAD_TO - 8)
-#define CONFIG_SPL_BSS_START_ADDR	(CONFIG_SPL_TEXT_BASE + \
+#define CONFIG_SPL_BSS_START_ADDR	(CONFIG_ISW_ENTRY_ADDR + \
 					CONFIG_SPL_MAX_SIZE)
 #define CONFIG_SPL_BSS_MAX_SIZE		(32 * 1024)
 #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
@@ -51,8 +43,6 @@
 					CONFIG_SYS_SPL_MALLOC_SIZE + \
 					SPL_MALLOC_F_SIZE + \
 					KEYSTONE_SPL_STACK_SIZE - 4)
-#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SYS_SPI_U_BOOT_OFFS	CONFIG_SPL_PAD_TO
 
 /* SRAM scratch space entries  */
 #define SRAM_SCRATCH_SPACE_ADDR	CONFIG_SPL_STACK + 0x8
@@ -63,13 +53,8 @@
 
 /* UART Configuration */
 #define CONFIG_SYS_NS16550_MEM32
-#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	-4
-#endif
 #define CONFIG_SYS_NS16550_COM1		KS2_UART0_BASE
 #define CONFIG_SYS_NS16550_COM2		KS2_UART1_BASE
-#define CONFIG_CONS_INDEX		1
 
 #ifndef CONFIG_SOC_K2G
 #define CONFIG_SYS_NS16550_CLK		ks_clk_get_rate(KS2_CLK1_6)
@@ -78,29 +63,10 @@
 #endif
 
 /* SPI Configuration */
-#define CONFIG_DAVINCI_SPI
 #define CONFIG_SYS_SPI_CLK		ks_clk_get_rate(KS2_CLK1_6)
-#define CONFIG_SF_DEFAULT_SPEED		30000000
-#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
-#define CONFIG_SYS_SPI0
-#define CONFIG_SYS_SPI_BASE		KS2_SPI0_BASE
-#define CONFIG_SYS_SPI0_NUM_CS		4
-#define CONFIG_SYS_SPI1
-#define CONFIG_SYS_SPI1_BASE		KS2_SPI1_BASE
-#define CONFIG_SYS_SPI1_NUM_CS		4
-#define CONFIG_SYS_SPI2
-#define CONFIG_SYS_SPI2_BASE		KS2_SPI2_BASE
-#define CONFIG_SYS_SPI2_NUM_CS		4
-#ifdef CONFIG_SPL_BUILD
-#undef CONFIG_DM_SPI
-#undef CONFIG_DM_SPI_FLASH
-#endif
 
 /* Network Configuration */
-#define CONFIG_PHY_MARVELL
-#define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT		32
@@ -140,20 +106,15 @@
 #define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE	KS2_NETCP_PDMA_TX_SND_QUEUE
 
 /* Keystone net */
-#define CONFIG_DRIVER_TI_KEYSTONE_NET
 #define CONFIG_KSNET_MAC_ID_BASE		KS2_MAC_ID_BASE_ADDR
 #define CONFIG_KSNET_NETCP_BASE			KS2_NETCP_BASE
 #define CONFIG_KSNET_SERDES_SGMII_BASE		KS2_SGMII_SERDES_BASE
 #define CONFIG_KSNET_SERDES_SGMII2_BASE		KS2_SGMII_SERDES2_BASE
 #define CONFIG_KSNET_SERDES_LANES_PER_SGMII	KS2_LANES_PER_SGMII_SERDES
 
-/* SerDes */
-#define CONFIG_TI_KEYSTONE_SERDES
-
 #define CONFIG_AEMIF_CNTRL_BASE		KS2_AEMIF_CNTRL_BASE
 
 /* I2C Configuration */
-#define CONFIG_SYS_I2C_DAVINCI
 #define CONFIG_SYS_DAVINCI_I2C_SPEED	100000
 #define CONFIG_SYS_DAVINCI_I2C_SLAVE	0x10 /* SMBus host address */
 #define CONFIG_SYS_DAVINCI_I2C_SPEED1	100000
@@ -169,13 +130,11 @@
 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 
 /* NAND Configuration */
-#define CONFIG_NAND_DAVINCI
 #define CONFIG_KEYSTONE_RBL_NAND
 #define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE	CONFIG_ENV_OFFSET
 #define CONFIG_SYS_NAND_MASK_CLE		0x4000
 #define CONFIG_SYS_NAND_MASK_ALE		0x2000
 #define CONFIG_SYS_NAND_CS			2
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
 
 #define CONFIG_SYS_NAND_LARGEPAGE
@@ -183,18 +142,19 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
-#define CONFIG_MTD_PARTITIONS
 
-/* USB Configuration */
-#define CONFIG_USB_XHCI_KEYSTONE
-#define CONFIG_USB_SS_BASE			KS2_USB_SS_BASE
-#define CONFIG_USB_HOST_XHCI_BASE		KS2_USB_HOST_XHCI_BASE
-#define CONFIG_DEV_USB_PHY_BASE			KS2_DEV_USB_PHY_BASE
-#define CONFIG_USB_PHY_CFG_BASE			KS2_USB_PHY_CFG_BASE
+#define DFU_ALT_INFO_MMC \
+	"dfu_alt_info_mmc=" \
+	"MLO fat 0 1;" \
+	"u-boot.img fat 0 1;" \
+	"uEnv.txt fat 0 1\0"
+
+/* DFU settings */
+#define DFUARGS \
+	"dfu_bufsiz=0x10000\0" \
+	DFU_ALT_INFO_MMC \
 
 /* U-Boot general configuration */
-#define CONFIG_MISC_INIT_R
-#define CONFIG_MX_CYCLIC
 #define CONFIG_TIMESTAMP
 
 /* EDMA3 */
@@ -231,16 +191,18 @@
 #define CONFIG_EXTRA_ENV_SETTINGS					\
 	DEFAULT_LINUX_BOOT_ENV						\
 	CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS				\
+	DFUARGS								\
 	"bootdir=/boot\0" \
 	"tftp_root=/\0"							\
 	"nfs_root=/export\0"						\
 	"mem_lpae=1\0"							\
+	"uinitrd_fixup=1\0"						\
 	"addr_ubi=0x82000000\0"						\
 	"addr_secdb_key=0xc000000\0"					\
 	"name_kern=zImage\0"						\
 	"addr_mon=0x87000000\0"						\
-	"addr_non_sec_mon=0x0c087fc0\0"					\
-	"addr_load_sec_bm=0x0c08c000\0"					\
+	"addr_non_sec_mon=0x0c097fc0\0"					\
+	"addr_load_sec_bm=0x0c09c000\0"					\
 	"run_mon=mon_install ${addr_mon}\0"				\
 	"run_mon_hs=mon_install ${addr_non_sec_mon} "			\
 			"${addr_load_sec_bm}\0"				\
@@ -258,12 +220,10 @@
 	"get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
 	"get_mon_nfs=nfs ${addr_mon} ${nfs_root}/boot/${name_mon}\0"	\
 	"get_mon_ubi=ubifsload ${addr_mon} ${bootdir}/${name_mon}\0"	\
-	"get_fit_net=dhcp ${fit_loadaddr} ${tftp_root}"			\
-						"/${fit_bootfile}\0"	\
-	"get_fit_nfs=nfs ${fit_loadaddr} ${nfs_root}/boot/${fit_bootfile}\0"\
-	"get_fit_ubi=ubifsload ${fit_loadaddr} ${bootdir}/${fit_bootfile}\0"\
-	"get_fit_mmc=load mmc ${bootpart} ${fit_loadaddr} "		\
-					"${bootdir}/${fit_bootfile}\0"	\
+	"get_fit_net=dhcp ${addr_fit} ${tftp_root}/${name_fit}\0"	\
+	"get_fit_nfs=nfs ${addr_fit} ${nfs_root}/boot/${name_fit}\0"	\
+	"get_fit_ubi=ubifsload ${addr_fit} ${bootdir}/${name_fit}\0"	\
+	"get_fit_mmc=load mmc ${bootpart} ${addr_fit} ${bootdir}/${name_fit}\0" \
 	"get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0"	\
 	"get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \
 	"burn_uboot_spi=sf probe; sf erase 0 0x100000; "		\
@@ -279,8 +239,7 @@
 	"get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0"	\
 	"get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0"	\
 	"get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
-	"get_fit_ramfs=dhcp ${fit_loadaddr} ${tftp_root}"		\
-						"/${fit_bootfile}\0"	\
+	"get_fit_ramfs=dhcp ${addr_fit} ${tftp_root}/${name_fit}\0"	\
 	"get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0"	\
 	"get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0"	\
 	"get_ubi_nfs=nfs ${addr_ubi} ${nfs_root}/boot/${name_ubi}\0"	\
@@ -308,7 +267,7 @@
 	"run run_mon_hs; "						\
 	"run init_${boot}; "						\
 	"run get_fit_${boot}; "						\
-	"bootm ${fit_loadaddr}#${name_fdt}"
+	"bootm ${addr_fit}#${name_fdt}"
 #endif
 #endif