X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fsocfpga_vining_fpga.h;h=8b97cd93a78ad00f64a0c9612f15b1f7da19f6e6;hb=d1bbf833aa7b45c00a42227b9563134643e44237;hp=1ccde1a76fee11630b9397661937fdd92e64e814;hpb=f15715afea3e7b576fad1f6877a073b65576a335;p=oweals%2Fu-boot.git diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index 1ccde1a76f..8b97cd93a7 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -1,75 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2015 Marek Vasut - * - * SPDX-License-Identifier: GPL-2.0+ + * Copyright (C) 2015-2019 Marek Vasut */ -#ifndef __CONFIG_SAMTEC_VINING_FPGA_H__ -#define __CONFIG_SAMTEC_VINING_FPGA_H__ +#ifndef __CONFIG_SOFTING_VINING_FPGA_H__ +#define __CONFIG_SOFTING_VINING_FPGA_H__ #include -/* U-Boot Commands */ -#define CONFIG_SYS_NO_FLASH -#define CONFIG_DOS_PARTITION -#define CONFIG_FAT_WRITE -#define CONFIG_HW_WATCHDOG - -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_LED - /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */ /* Booting Linux */ -#define CONFIG_BOOTDELAY 5 -#define CONFIG_BOOTFILE "openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb" -#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) +#define CONFIG_BOOTFILE "fitImage" #define CONFIG_BOOTCOMMAND "run selboot" +#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* I2C EEPROM */ -#ifdef CONFIG_CMD_EEPROM -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_I2C_EEPROM_BUS 0 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70 -#endif - -/* - * Status LEDs: - * 0 ... Top Green - * 1 ... Top Red - * 2 ... Bottom Green - * 3 ... Bottom Red - */ -#define CONFIG_STATUS_LED -#define CONFIG_GPIO_LED -#define CONFIG_BOARD_SPECIFIC_LED -#define STATUS_LED_BIT 48 -#define STATUS_LED_STATE STATUS_LED_OFF -#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) -#define STATUS_LED_BIT1 53 -#define STATUS_LED_STATE1 STATUS_LED_OFF -#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) -#define STATUS_LED_BIT2 54 -#define STATUS_LED_STATE2 STATUS_LED_OFF -#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2) -#define STATUS_LED_BIT3 65 -#define STATUS_LED_STATE3 STATUS_LED_OFF -#define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 2) - /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) #define CONFIG_BOOTP_SEND_HOSTNAME -/* PHY */ -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 #endif /* Extra Environment */ -#define CONFIG_HOSTNAME socfpga_vining_fpga +#define CONFIG_HOSTNAME "socfpga_vining_fpga" /* * Active LOW GPIO buttons: @@ -77,19 +31,12 @@ * B: GPIO 78 ... the button between USB A ports * * The logic: - * if button B is not pressed, boot normal Linux system immediatelly - * if button B is pressed, wait $bootdelay and boot recovery system + * if button B is pressed, boot recovery system after 10 seconds + * if force_boottype is set, boot system depending on the value in the + * $force_boottype variable after 1 second + * if button B is not pressed and force_boottype is not set, boot normal + * Linux system after 5 seconds */ -#define CONFIG_PREBOOT \ - "setenv hostname vining-${unit_serial} ; " \ - "setenv PS1 \"${unit_ident} (${unit_serial}) => \" ; " \ - "if gpio input 78 ; then " \ - "setenv bootdelay 10 ; " \ - "setenv boottype rcvr ; " \ - "else " \ - "setenv bootdelay 5 ; " \ - "setenv boottype norm ; " \ - "fi" #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=n\0" \ @@ -98,21 +45,36 @@ "bootscript=boot.scr\0" \ "ubimtdnr=5\0" \ "ubimtd=rootfs\0" \ - "ubipart=ubi0:rootfs\0" \ + "ubipart=ubi0:vining-fpga-rootfs\0" \ "ubisfcs=1\0" /* Default is flash at CS#1 */ \ "netdev=eth0\0" \ - "hostname=vining_fpga\0" \ + "hostname=vining_fpga\0" \ "kernel_addr_r=0x10000000\0" \ - "mtdparts_0=ff705000.spi.0:" \ + "fdt_addr_r=0x20000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1\0" \ + "mtdparts_0_16m=ff705000.spi.0:" /* 16MiB+128MiB SF config */ \ "1m(u-boot)," \ "64k(env1)," \ "64k(env2)," \ - "256k(samtec1)," \ - "256k(samtec2)," \ + "256k(softing1)," \ + "256k(softing2)," \ "-(rcvrfs)\0" /* Recovery */ \ - "mtdparts_1=ff705000.spi.1:" \ - "32m(rootfs)," \ + "mtdparts_0_256m=ff705000.spi.0:" /* 256MiB(+256MiB) config */ \ + "1m(u-boot)," \ + "64k(env1)," \ + "64k(env2)," \ + "256k(softing1)," \ + "256k(softing2)," \ + "14720k(rcvrfs)," /* Recovery */ \ + "64m(rootfs)," /* Root */ \ + "-(userfs)\0" /* User */ \ + "mtdparts_1_128m=ff705000.spi.1:" /* 16MiB+128MiB SF config */ \ + "64m(rootfs)," \ "-(userfs)\0" \ + "mtdparts_1_256m=ff705000.spi.1:" /* 256MiB+256MiB SF config */ \ + "-(userfs2)\0" \ "update_filename=u-boot-with-spl-dtb.sfp\0" \ "update_qspi_offset=0x0\0" \ "update_qspi=" /* Update the QSPI firmware */ \ @@ -121,6 +83,23 @@ "sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \ "fi ; " \ "fi\0" \ + "sf_identify=" \ + "setenv sf_size_0 ; setenv sf_size_1 ; " \ + "sf probe 0:0 && setenv sf_size_0 ${sf_size} ; " \ + "sf probe 0:1 && setenv sf_size_1 ${sf_size} ; " \ + "if test -z \"${sf_size_1}\" ; then " \ + /* 1x256MiB SF */ \ + "setenv mtdparts_0 ${mtdparts_0_256m} ; " \ + "setenv mtdparts_1 ; " \ + "elif test \"${sf_size_0}\" = \"1000000\" ; then " \ + /* 16MiB+128MiB SF */ \ + "setenv mtdparts_0 ${mtdparts_0_16m} ; " \ + "setenv mtdparts_1 ${mtdparts_1_128m} ; " \ + "else " \ + /* 256MiB+256MiB SF */ \ + "setenv mtdparts_0 ${mtdparts_0_256m} ; " \ + "setenv mtdparts_1 ${mtdparts_1_256m} ; " \ + "fi\0" \ "fpga_filename=output_file.rbf\0" \ "load_fpga=" /* Load FPGA bitstream */ \ "if tftp ${fpga_filename} ; then " \ @@ -137,7 +116,11 @@ "addmisc=" \ "setenv bootargs ${bootargs} ${miscargs}\0" \ "addmtd=" \ - "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \ + "if test -z \"${sf_size_1}\" ; then " \ + "setenv mtdparts \"${mtdparts_0}\" ; " \ + "else " \ + "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \ + "fi ; " \ "setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \ "addargs=run addcons addmtd addmisc\0" \ "ubiload=" \ @@ -159,29 +142,47 @@ "setenv ubimtdnr 5 ; " \ "setenv mtdparts mtdparts=${mtdparts_0} ; " \ "setenv mtdids nor0=ff705000.spi.0 ; " \ - "setenv ubipart ubi0:rootfs ; " \ + "setenv ubipart ubi0:vining-fpga-rootfs ; " \ "else " \ - "setenv ubisfcs 1 ; " \ - "setenv ubimtd rootfs ; " \ - "setenv ubimtdnr 6 ; " \ - "setenv mtdparts mtdparts=${mtdparts_1} ; " \ - "setenv mtdids nor0=ff705000.spi.1 ; " \ - "setenv ubipart ubi0:rootfs ; " \ + "if test \"${sf_size_0}\" = \"1000000\" ; then "\ + /* 16MiB+128MiB SF */ \ + "setenv ubisfcs 1 ; " \ + "setenv ubimtd rootfs ; " \ + "setenv ubimtdnr 6 ; " \ + "setenv mtdparts mtdparts=${mtdparts_1} ; " \ + "setenv mtdids nor0=ff705000.spi.1 ; " \ + "setenv ubipart ubi0:vining-fpga-rootfs ; " \ + "else " \ + /* 256MiB(+256MiB) SF */ \ + "setenv ubisfcs 0 ; " \ + "setenv ubimtd rootfs ; " \ + "setenv ubimtdnr 6 ; " \ + "setenv mtdparts mtdparts=${mtdparts_0} ; " \ + "setenv mtdids nor0=ff705000.spi.0 ; " \ + "setenv ubipart ubi0:vining-fpga-rootfs ; " \ + "fi ; " \ "fi ; " \ "sf probe 0:${ubisfcs}\0" \ + "boot_kernel=" \ + "if test -z \"${sf_size_1}\" ; then " /* 1x256MiB SF */ \ + "imxtract ${kernel_addr_r} fdt@1 ${fdt_addr_r} && " \ + "fdt addr ${fdt_addr_r} && " \ + "fdt resize && " \ + "fdt set /soc/spi@ff705000/n25q00@1 status disabled && " \ + "bootm ${kernel_addr_r}:kernel@1 - ${fdt_addr_r} ; " \ + "else " \ + "bootm ${kernel_addr_r} ; " \ + "fi\0" \ "ubi_ubi=" \ - "run ubi_sfsel ubiload ubiargs addargs ; " \ - "bootm ${kernel_addr_r}\0" \ + "run ubi_sfsel ubiload ubiargs addargs boot_kernel\0" \ "ubi_nfs=" \ - "run ubiload nfsargs addip addargs ; " \ - "bootm ${kernel_addr_r}\0" \ + "run ubiload nfsargs addip addargs boot_kernel\0" \ "net_ubi=" \ - "run netload ubiargs addargs ; " \ - "bootm ${kernel_addr_r}\0" \ + "run netload ubiargs addargs boot_kernel\0" \ "net_nfs=" \ - "run netload nfsargs addip addargs ; " \ - "bootm ${kernel_addr_r}\0" \ + "run netload nfsargs addip addargs boot_kernel\0" \ "selboot=" /* Select from where to boot. */ \ + "run sf_identify ; " \ "if test \"${bootmode}\" = \"qspi\" ; then " \ "led all off ; " \ "if test \"${boottype}\" = \"rcvr\" ; then " \ @@ -192,35 +193,7 @@ "run ubi_ubi ; " \ "else echo \"Unsupported boot mode: \"${bootmode} ; " \ "fi\0" \ - -#define CONFIG_CMD_UBI -#define CONFIG_CMD_UBIFS -#define CONFIG_MTD_UBI_FASTMAP -#define CONFIG_RBTREE -#define CONFIG_LZO -#define MTDPARTS_DEFAULT \ - "mtdparts=ff705000.spi.0:" \ - "1m(u-boot)," \ - "64k(env1)," \ - "64k(env2)," \ - "256k(samtec1)," \ - "256k(samtec2)," \ - "-(rcvrfs);" /* Recovery */ \ - -#define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_SYS_REDUNDAND_ENVIRONMENT -#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE -#define CONFIG_ENV_SECT_SIZE (64 * 1024) -#define CONFIG_ENV_OFFSET 0x100000 -#define CONFIG_ENV_OFFSET_REDUND \ - (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) - -#define CONFIG_MISC_INIT_R -#define CONFIG_BOARD_LATE_INIT - -/* Enable DFU to SF and RAM */ -#define CONFIG_DFU_RAM -#define CONFIG_DFU_SF + "socfpga_legacy_reset_compat=1\0" /* Support changing the prompt string */ #define CONFIG_CMDLINE_PS_SUPPORT @@ -228,4 +201,4 @@ /* The rest of the configuration is shared */ #include -#endif /* __CONFIG_SAMTEC_VINING_FPGA_H__ */ +#endif /* __CONFIG_SOFTING_VINING_FPGA_H__ */