X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fsmdk2400.h;h=fd51219af4cddd1d2e656030aaa92a9d09f3b057;hb=abaa5ba4e3b52f82b8158044cba6cf7986309d43;hp=ac1642e1fcef053ef3bd8ec0ce2fbcde9efa058c;hpb=10a3367955bc2033b288915f8f10d0e507fe2fa1;p=oweals%2Fu-boot.git diff --git a/include/configs/smdk2400.h b/include/configs/smdk2400.h index ac1642e1fc..fd51219af4 100644 --- a/include/configs/smdk2400.h +++ b/include/configs/smdk2400.h @@ -4,7 +4,7 @@ * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH * Marius Groeger - * Gary Jennejohn + * Gary Jennejohn * * Configuation settings for the SAMSUNG board. * @@ -34,9 +34,10 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_ARM920T 1 /* This is an ARM920T core */ -#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */ -#define CONFIG_SMDK2400 1 /* on an SAMSUNG SMDK2400 Board */ +#define CONFIG_ARM920T 1 /* This is an ARM920T core */ +#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */ +#define CONFIG_S3C2400 1 /* specifically a SAMSUNG S3C2400 SoC */ +#define CONFIG_SMDK2400 1 /* on an SAMSUNG SMDK2400 Board */ /* input clock of PLL */ #define CONFIG_SYS_CLK_FREQ 12000000 /* SMDK2400 has 12 MHz input clock */ @@ -50,19 +51,21 @@ /* * Size of malloc() pool */ -#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* * Hardware drivers */ -#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */ -#define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */ -#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */ +#define CONFIG_NET_MULTI +#define CONFIG_CS8900 /* we have a CS8900 on-board */ +#define CONFIG_CS8900_BASE 0x07000300 /* agrees with WIN CE PA */ +#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SAMSUNG */ #undef CONFIG_HWFLOW /* include RTS/CTS flow control support */ @@ -127,26 +130,22 @@ /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "SMDK2400 # " /* Monitor Command Prompt */ -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "SMDK2400 # " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_MEMTEST_START 0x0c000000 /* memtest works on */ -#define CFG_MEMTEST_END 0x0e000000 /* 32 MB in DRAM */ +#define CONFIG_SYS_MEMTEST_START 0x0c000000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x0e000000 /* 32 MB in DRAM */ -#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ +#define CONFIG_SYS_LOAD_ADDR 0x0cf00000 /* default load address */ -#define CFG_LOAD_ADDR 0x0cf00000 /* default load address */ - -/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ -/* it to wrap 100 times (total 1562500) to get 1 sec. */ -#define CFG_HZ 1562500 +#define CONFIG_SYS_HZ 1000 /* valid baudrates */ -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /*----------------------------------------------------------------------- * Stack sizes @@ -166,26 +165,26 @@ #define PHYS_SDRAM_1 0x0c000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ -#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */ +#define CONFIG_SYS_FLASH_BASE 0x00000000 /* Flash Bank #1 */ /*----------------------------------------------------------------------- * FLASH and environment organization */ -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT (64) /* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT (64) /* max number of sectors on one chip */ /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */ -#define CFG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_IS_IN_FLASH 1 /* Address and size of Primary Environment Sector */ -#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x40000) -#define CFG_ENV_SIZE 0x40000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) +#define CONFIG_ENV_SIZE 0x40000 /* Address and size of Redundant Environment Sector */ -#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SIZE) -#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) #endif /* __CONFIG_H */