X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fsh7785lcr.h;h=9c32bfc58bb1f5d8ef0f78c1db944dd0c3ee9f11;hb=91dd7ca6ac9b9b760a1671ec845d4401a13df11e;hp=1b59059451a6126a821f2ad28ffe27d631692cc4;hpb=f82642e33899766892499b163e60560fbbf87773;p=oweals%2Fu-boot.git diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 1b59059451..9c32bfc58b 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -37,10 +37,10 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_NFS -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_RUN -#define CONFIG_CMD_ENV +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_SH_ZIMAGEBOOT #define CONFIG_CMD_USB #define CONFIG_USB_STORAGE @@ -61,11 +61,24 @@ #undef CONFIG_SHOW_BOOT_PROGRESS /* MEMORY */ +#if defined(CONFIG_SH_32BIT) +#define CONFIG_SYS_TEXT_BASE 0x8FF80000 +/* 0x40000000 - 0x47FFFFFF does not use */ +#define CONFIG_SH_SDRAM_OFFSET (0x8000000) +#define SH7785LCR_SDRAM_PHYS_BASE (0x40000000 + CONFIG_SH_SDRAM_OFFSET) +#define SH7785LCR_SDRAM_BASE (0x80000000 + CONFIG_SH_SDRAM_OFFSET) +#define SH7785LCR_SDRAM_SIZE (384 * 1024 * 1024) +#define SH7785LCR_FLASH_BASE_1 (0xa0000000) +#define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024) +#define SH7785LCR_USB_BASE (0xa6000000) +#else +#define CONFIG_SYS_TEXT_BASE 0x0FF80000 #define SH7785LCR_SDRAM_BASE (0x08000000) #define SH7785LCR_SDRAM_SIZE (128 * 1024 * 1024) #define SH7785LCR_FLASH_BASE_1 (0xa0000000) #define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024) #define SH7785LCR_USB_BASE (0xb4000000) +#endif #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PROMPT "=> " @@ -99,7 +112,6 @@ #define CONFIG_SYS_MONITOR_BASE (SH7785LCR_FLASH_BASE_1) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MALLOC_LEN (512 * 1024) -#define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ @@ -123,7 +135,6 @@ #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* R8A66597 */ -#define LITTLEENDIAN /* for include/usb.h */ #define CONFIG_USB_R8A66597_HCD #define CONFIG_R8A66597_BASE_ADDR SH7785LCR_USB_BASE #define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */ @@ -134,6 +145,15 @@ #define CONFIG_PCI #define CONFIG_SH4_PCI #define CONFIG_SH7780_PCI +#if defined(CONFIG_SH_32BIT) +#define CONFIG_SH7780_PCI_LSR 0x1ff00001 +#define CONFIG_SH7780_PCI_LAR 0x5f000000 +#define CONFIG_SH7780_PCI_BAR 0x5f000000 +#else +#define CONFIG_SH7780_PCI_LSR 0x07f00001 +#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE +#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE +#endif #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 @@ -145,8 +165,15 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ +#if defined(CONFIG_SH_32BIT) +#define CONFIG_PCI_SYS_PHYS SH7785LCR_SDRAM_PHYS_BASE +#else +#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE +#endif +#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE +#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE + /* Network device (RTL8169) support */ -#define CONFIG_NET_MULTI #define CONFIG_RTL8169 /* ENV setting */ @@ -161,7 +188,7 @@ /* Board Clock */ /* The SCIF used external clock. system clock only used timer. */ #define CONFIG_SYS_CLK_FREQ 50000000 -#define TMU_CLK_DIVIDER 4 -#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) +#define CONFIG_SYS_TMU_CLK_DIV 4 +#define CONFIG_SYS_HZ 1000 #endif /* __SH7785LCR_H */