X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fpxa255_idp.h;h=0666f7ba4fdcec13ac67b44d5200ef22fc5da6f4;hb=d9fdfe0aa598978054f108ba42ca928aceb8c090;hp=7485f7241ce1c48dee93d417a51d0ee0eb85156d;hpb=712ac6a1a6909a58d6549fb220cc921a7e9f9979;p=oweals%2Fu-boot.git

diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h
index 7485f7241c..0666f7ba4f 100644
--- a/include/configs/pxa255_idp.h
+++ b/include/configs/pxa255_idp.h
@@ -42,7 +42,7 @@
  * so we MUST NOT initialize critical regs like mem-timing ...
  */
 #undef CONFIG_SKIP_LOWLEVEL_INIT			/* define for developing */
-#undef CONFIG_SKIP_RELOCATE_UBOOT			/* define for developing */
+#define	CONFIG_SYS_TEXT_BASE	0x0
 
 /*
  * define the following to enable debug blinks.  A debug blink function
@@ -55,7 +55,7 @@
  * High Level Configuration Options
  * (easy to change)
  */
-#define CONFIG_PXA250		1	/* This is an PXA250 CPU    */
+#define CONFIG_CPU_PXA25X		1	/* This is an PXA250 CPU    */
 
 #undef CONFIG_LCD
 #ifdef CONFIG_LCD
@@ -64,18 +64,17 @@
 
 #define CONFIG_MMC		1
 #define CONFIG_DOS_PARTITION	1
-#define BOARD_LATE_INIT		1
+#define CONFIG_BOARD_LATE_INIT
 
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN	    (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 
 /*
  * PXA250 IDP memory map information
@@ -87,7 +86,7 @@
 /*
  * Hardware drivers
  */
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_SMC91111
 #define CONFIG_SMC91111_BASE	(PXA_CS5_PHYS + IDP_CS5_ETH_OFFSET + 0x300)
 #define CONFIG_SMC_USE_32_BIT	1
 /* #define CONFIG_SMC_USE_IOFUNCS */
@@ -100,6 +99,7 @@
 /*
  * select serial console configuration
  */
+#define CONFIG_PXA_SERIAL
 #define CONFIG_FFUART	       1       /* we use FFUART on LUBBOCK */
 
 /* allow to overwrite serial and ethaddr */
@@ -269,7 +269,7 @@
 /*
  * Physical Memory Map
  */
-#define CONFIG_NR_DRAM_BANKS	4	   /* we have 1 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 bank of DRAM */
 #define PHYS_SDRAM_1		0xa0000000 /* SDRAM Bank #1 */
 #define PHYS_SDRAM_1_SIZE	0x04000000 /* 64 MB */
 #define PHYS_SDRAM_2		0xa4000000 /* SDRAM Bank #2 */
@@ -290,6 +290,9 @@
 
 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		0xfffff800
+
 /*
  * GPIO settings
  */
@@ -312,6 +315,9 @@
 
 #define CONFIG_SYS_PSSR_VAL		0x20
 
+#define	CONFIG_SYS_CCCR			CCCR_L27|CCCR_M2|CCCR_N10
+#define	CONFIG_SYS_CKEN			0x0
+
 /*
  * Memory settings
  */
@@ -321,6 +327,8 @@
 #define CONFIG_SYS_MDCNFG_VAL		0x090009C9
 #define CONFIG_SYS_MDREFR_VAL		0x0085C017
 #define CONFIG_SYS_MDMRS_VAL		0x00220022
+#define	CONFIG_SYS_FLYCNFG_VAL		0x00000000
+#define	CONFIG_SYS_SXCNFG_VAL		0x00000000
 
 /*
  * PCMCIA and CF Interfaces