X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fomap3_sdp3430.h;h=404aed2f5f9cbe7a1becc1ff7b97ae3be34ab2c6;hb=2ea73e9e38befa872d215c919f766d837d7a1312;hp=d3d25abc3f5c38b85b585153f400e1c9ded5040a;hpb=8152c6f6f538c0c3b61a9e0cd6e1c67f1bcc687a;p=oweals%2Fu-boot.git

diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h
index d3d25abc3f..404aed2f5f 100644
--- a/include/configs/omap3_sdp3430.h
+++ b/include/configs/omap3_sdp3430.h
@@ -137,9 +137,6 @@
 #define CONFIG_SYS_I2C_BUS_SELECT	1
 #define CONFIG_DRIVER_OMAP34XX_I2C	1
 
-/* DDR - I use Infineon DDR */
-#define CONFIG_OMAP3_INFINEON_DDR	1
-
 /* OMITTED:  single 1 Gbit MT29F1G NAND flash */
 
 /*
@@ -303,10 +300,6 @@
  * The stack sizes are set up in start.S using the settings below
  */
 #define CONFIG_STACKSIZE	(128 << 10) /* Regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ	(4 << 10) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ	(4 << 10) /* FIQ stack */
-#endif
 
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
@@ -322,9 +315,6 @@
 #define PHYS_SDRAM_1_SIZE	(32 << 20) /* at least 32 meg */
 #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
 
-/* SDRAM Bank Allocation method */
-#define SDRC_R_B_C		1
-
 /*--------------------------------------------------------------------------*/
 
 /*