X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fml300.h;h=8d482216dd62f712ac3cf8a42a06a253446badf5;hb=35dd025c70fcc4389317db2f2a9d14795172137d;hp=0183041842af27139d5f25a5d2a052a7ee1d25c2;hpb=d1bc6c8d5f4a9c7ca9fb2292d5c65f846dcc3995;p=oweals%2Fu-boot.git

diff --git a/include/configs/ml300.h b/include/configs/ml300.h
index 0183041842..8d482216dd 100644
--- a/include/configs/ml300.h
+++ b/include/configs/ml300.h
@@ -54,6 +54,7 @@
 
 #define CONFIG_405		1	/* This is a PPC405 CPU		*/
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
+#define CONFIG_XILINX_405	1
 #define CONFIG_XILINX_ML300	1	/* ...on a Xilinx ML300 board	*/
 
 #define CONFIG_SYSTEMACE	1
@@ -61,13 +62,13 @@
 #define CFG_SYSTEMACE_BASE	XPAR_OPB_SYSACE_0_BASEADDR
 #define CFG_SYSTEMACE_WIDTH	XPAR_XSYSACE_MEM_WIDTH
 
-#define CFG_ENV_IS_IN_EEPROM	1	/* environment is in EEPROM */
+#define CONFIG_ENV_IS_IN_EEPROM	1	/* environment is in EEPROM */
 
 /* following are used only if env is in EEPROM */
-#ifdef	CFG_ENV_IS_IN_EEPROM
+#ifdef	CONFIG_ENV_IS_IN_EEPROM
 #define CFG_I2C_EEPROM_ADDR	XPAR_PERSISTENT_0_IIC_0_EEPROMADDR
 #define CFG_I2C_EEPROM_ADDR_LEN 1
-#define CFG_ENV_OFFSET		XPAR_PERSISTENT_0_IIC_0_BASEADDR
+#define CONFIG_ENV_OFFSET		XPAR_PERSISTENT_0_IIC_0_BASEADDR
 #define CONFIG_MISC_INIT_R	1	/* used to call out convert_env() */
 #define CONFIG_ENV_OVERWRITE	1	/* allow users to update ethaddr and serial# */
 #endif
@@ -75,7 +76,7 @@
 #include "../board/xilinx/ml300/xparameters.h"
 
 #define CFG_NO_FLASH		1	/* no flash */
-#define CFG_ENV_SIZE		XPAR_PERSISTENT_0_IIC_0_HIGHADDR - XPAR_PERSISTENT_0_IIC_0_BASEADDR + 1
+#define CONFIG_ENV_SIZE		XPAR_PERSISTENT_0_IIC_0_HIGHADDR - XPAR_PERSISTENT_0_IIC_0_BASEADDR + 1
 #define CONFIG_BAUDRATE		9600
 #define CONFIG_BOOTDELAY	3	/* autoboot after 3 seconds	*/
 
@@ -159,12 +160,6 @@
  */
 #define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
 
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE		16384	/* For AMCC 405 CPUs	*/
-#define CFG_CACHELINE_SIZE	32	/* ...			*/
-
 /*-----------------------------------------------------------------------
  * Definitions for initial stack pointer and data area (in DPRAM)
  */