X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1088ardb.h;h=4459994eb4365706624c3880fad9d50251edf992;hb=9629ccdde79adb1e471cfb24d9fee9f5c6c94aa6;hp=39f1345f9793e85a7d307be4f9bdf3cc5c6c9dc8;hpb=002e91087c817f8281fccee327e0d8e98c691a2f;p=oweals%2Fu-boot.git diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 39f1345f97..4459994eb4 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2017 NXP - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __LS1088A_RDB_H @@ -9,13 +8,15 @@ #include "ls1088a_common.h" -#define CONFIG_DISPLAY_BOARDINFO_LATE +#define CONFIG_MISC_INIT_R #if defined(CONFIG_QSPI_BOOT) -#define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ -#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x40000 +#elif defined(CONFIG_SD_BOOT) +#define CONFIG_ENV_OFFSET (3 * 1024 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SIZE 0x2000 #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) @@ -23,9 +24,12 @@ #define CONFIG_ENV_SIZE 0x20000 #endif -#if defined(CONFIG_QSPI_BOOT) +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#ifndef CONFIG_SPL_BUILD #define CONFIG_QIXIS_I2C_ACCESS +#endif #define SYS_NO_FLASH +#undef CONFIG_CMD_IMLS #endif #define CONFIG_SYS_CLK_FREQ 100000000 @@ -91,6 +95,11 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #endif #endif + +#ifndef SPL_NO_IFC +#define CONFIG_NAND_FSL_IFC +#endif + #define CONFIG_SYS_NAND_MAX_ECCPOS 256 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 @@ -128,11 +137,16 @@ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE +#define CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +#ifndef SPL_NO_QIXIS #define CONFIG_FSL_QIXIS +#endif + #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define QIXIS_BRDCFG4_OFFSET 0x54 #define QIXIS_LBMAP_SWITCH 2 #define QIXIS_QMAP_MASK 0xe0 #define QIXIS_QMAP_SHIFT 5 @@ -141,9 +155,11 @@ #define QIXIS_LBMAP_DFLTBANK 0x00 #define QIXIS_LBMAP_ALTBANK 0x20 #define QIXIS_LBMAP_SD 0x00 +#define QIXIS_LBMAP_EMMC 0x00 #define QIXIS_LBMAP_SD_QSPI 0x00 #define QIXIS_LBMAP_QSPI 0x00 #define QIXIS_RCW_SRC_SD 0x40 +#define QIXIS_RCW_SRC_EMMC 0x41 #define QIXIS_RCW_SRC_QSPI 0x62 #define QIXIS_RST_CTL_RESET 0x31 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 @@ -207,6 +223,32 @@ #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define I2C_MUX_CH_VOL_MONITOR 0xA +/* Voltage monitor on channel 2*/ +#define I2C_VOL_MONITOR_ADDR 0x63 +#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 +#define I2C_VOL_MONITOR_BUS_V_OVF 0x1 +#define I2C_VOL_MONITOR_BUS_V_SHIFT 3 +#define I2C_SVDD_MONITOR_ADDR 0x4F + +#define CONFIG_VID_FLS_ENV "ls1088ardb_vdd_mv" +#define CONFIG_VID + +/* The lowest and highest voltage allowed for LS1088ARDB */ +#define VDD_MV_MIN 819 +#define VDD_MV_MAX 1212 + +#define CONFIG_VOL_MONITOR_LTC3882_SET +#define CONFIG_VOL_MONITOR_LTC3882_READ + +/* PM Bus commands code for LTC3882*/ +#define PMBUS_CMD_PAGE 0x0 +#define PMBUS_CMD_READ_VOUT 0x8B +#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 +#define PMBUS_CMD_VOUT_COMMAND 0x21 + +#define PWM_CHANNEL0 0x0 + /* * I2C bus multiplexer */ @@ -215,6 +257,8 @@ #define I2C_RETIMER_ADDR 0x18 #define I2C_MUX_CH_DEFAULT 0x8 #define I2C_MUX_CH5 0xD + +#ifndef SPL_NO_RTC /* * RTC configuration */ @@ -222,6 +266,7 @@ #define CONFIG_RTC_PCF8563 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ #define CONFIG_CMD_DATE +#endif /* EEPROM */ #define CONFIG_ID_EEPROM @@ -232,42 +277,150 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +#ifndef SPL_NO_QSPI /* QSPI device */ -#if defined(CONFIG_QSPI_BOOT) +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_FSL_QSPI -#define CONFIG_SPI_FLASH_SPANSION #define FSL_QSPI_FLASH_SIZE (1 << 26) #define FSL_QSPI_FLASH_NUM 2 #endif +#endif #define CONFIG_CMD_MEMINFO -#define CONFIG_CMD_MEMTEST #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE +#else #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#endif #define CONFIG_FSL_MEMAC +#ifndef SPL_NO_ENV /* Initial environment variables */ #if defined(CONFIG_QSPI_BOOT) +#define MC_INIT_CMD \ + "mcinitcmd=sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \ + "sf read 0x80100000 0xE00000 0x100000;" \ + "env exists secureboot && " \ + "sf read 0x80700000 0x700000 0x40000 && " \ + "sf read 0x80740000 0x740000 0x40000 && " \ + "esbc_validate 0x80700000 && " \ + "esbc_validate 0x80740000 ;" \ + "fsl_mc start mc 0x80000000 0x80100000\0" \ + "mcmemsize=0x70000000\0" +#elif defined(CONFIG_SD_BOOT) +#define MC_INIT_CMD \ + "mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \ + "mmc read 0x80100000 0x7000 0x800;" \ + "env exists secureboot && " \ + "mmc read 0x80700000 0x3800 0x10 && " \ + "mmc read 0x80740000 0x3A00 0x10 && " \ + "esbc_validate 0x80700000 && " \ + "esbc_validate 0x80740000 ;" \ + "fsl_mc start mc 0x80000000 0x80100000\0" \ + "mcmemsize=0x70000000\0" +#endif + #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ + "BOARD=ls1088ardb\0" \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ - "loadaddr=0x90100000\0" \ - "kernel_addr=0x100000\0" \ "ramdisk_addr=0x800000\0" \ "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x1000000\0" \ - "kernel_load=0xa0000000\0" \ + "fdt_addr=0x64f00000\0" \ + "kernel_addr=0x1000000\0" \ + "kernel_addr_sd=0x8000\0" \ + "kernelhdr_addr_sd=0x4000\0" \ + "kernel_start=0x580100000\0" \ + "kernelheader_start=0x580800000\0" \ + "scriptaddr=0x80000000\0" \ + "scripthdraddr=0x80080000\0" \ + "fdtheader_addr_r=0x80100000\0" \ + "kernelheader_addr=0x800000\0" \ + "kernelheader_addr_r=0x80200000\0" \ + "kernel_addr_r=0x81000000\0" \ + "kernelheader_size=0x40000\0" \ + "fdt_addr_r=0x90000000\0" \ + "load_addr=0xa0000000\0" \ "kernel_size=0x2800000\0" \ - "mcinitcmd=sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \ - "sf read 0x80100000 0xE00000 0x100000;" \ - "fsl_mc start mc 0x80000000 0x80100000\0" \ - "mcmemsize=0x70000000 \0" - + "kernel_size_sd=0x14000\0" \ + "kernelhdr_size_sd=0x10\0" \ + MC_INIT_CMD \ + BOOTENV \ + "boot_scripts=ls1088ardb_boot.scr\0" \ + "boot_script_hdr=hdr_ls1088ardb_bs.out\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ + "for distro_bootpart in ${devplist}; do " \ + "if fstype ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "bootfstype; then " \ + "run scan_dev_for_boot; " \ + "fi; " \ + "done\0" \ + "scan_dev_for_boot=" \ + "echo Scanning ${devtype} " \ + "${devnum}:${distro_bootpart}...; " \ + "for prefix in ${boot_prefixes}; do " \ + "run scan_dev_for_scripts; " \ + "done;\0" \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "env exists secureboot && load ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "${scripthdraddr} ${prefix}${boot_script_hdr} " \ + "&& esbc_validate ${scripthdraddr};" \ + "source ${scriptaddr}\0" \ + "installer=load mmc 0:2 $load_addr " \ + "/flex_installer_arm64.itb; " \ + "env exists mcinitcmd && run mcinitcmd && " \ + "mmc read 0x80200000 0x6800 0x800;" \ + "fsl_mc apply dpl 0x80200000;" \ + "bootm $load_addr#ls1088ardb\0" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ + "sf probe && sf read $load_addr " \ + "$kernel_addr $kernel_size ; env exists secureboot " \ + "&& sf read $kernelheader_addr_r $kernelheader_addr " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ + "bootm $load_addr#$BOARD\0" \ + "sd_bootcmd=echo Trying load from sd card..;" \ + "mmcinfo; mmc read $load_addr " \ + "$kernel_addr_sd $kernel_size_sd ;" \ + "env exists secureboot && mmc read $kernelheader_addr_r "\ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ + " && esbc_validate ${kernelheader_addr_r};" \ + "bootm $load_addr#$BOARD\0" + +#undef CONFIG_BOOTCOMMAND +#if defined(CONFIG_QSPI_BOOT) +/* Try to boot an on-QSPI kernel first, then do normal distro boot */ +#define CONFIG_BOOTCOMMAND \ + "sf read 0x80200000 0xd00000 0x100000;" \ + "env exists mcinitcmd && env exists secureboot " \ + " && sf read 0x80780000 0x780000 0x100000 " \ + "&& esbc_validate 0x80780000;env exists mcinitcmd " \ + "&& fsl_mc apply dpl 0x80200000;" \ + "run distro_bootcmd;run qspi_bootcmd;" \ + "env exists secureboot && esbc_halt;" + +/* Try to boot an on-SD kernel first, then do normal distro boot */ +#elif defined(CONFIG_SD_BOOT) +#define CONFIG_BOOTCOMMAND \ + "env exists mcinitcmd && mmcinfo; " \ + "mmc read 0x80200000 0x6800 0x800; " \ + "env exists mcinitcmd && env exists secureboot " \ + " && mmc read 0x80780000 0x3800 0x10 " \ + "&& esbc_validate 0x80780000;env exists mcinitcmd " \ + "&& fsl_mc apply dpl 0x80200000;" \ + "run distro_bootcmd;run sd_bootcmd;" \ + "env exists secureboot && esbc_halt;" #endif /* MAC/PHY configuration */ @@ -294,22 +447,21 @@ #define CONFIG_ETHPRIME "DPMAC1@xgmii" #define CONFIG_PHY_GIGE #endif +#endif /* MMC */ #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif -#undef CONFIG_CMDLINE_EDITING -#include +#ifndef SPL_NO_ENV #define BOOT_TARGET_DEVICES(func) \ - func(USB, usb, 0) \ func(MMC, mmc, 0) \ func(SCSI, scsi, 0) \ func(DHCP, dhcp, na) #include +#endif #include