X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1021aqds.h;h=8427be5adc188afef714554ca952fb41ec06e81b;hb=fd399a183991d4a6bc7376b3fe2cbfa4d9b0ada8;hp=56f8c0305ad429e5c6c6fdbed9aef0633af32207;hpb=1989374b21089c63019fc9648408c8d609023ffe;p=oweals%2Fu-boot.git diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 56f8c0305a..8427be5adc 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -51,14 +50,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FSL_PBL_RCW \ board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg #endif -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SPL_PAD_TO 0x1c000 -#define CONFIG_SYS_TEXT_BASE 0x82000000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) @@ -68,20 +63,12 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_MONITOR_LEN 0xc0000 #endif -#ifdef CONFIG_QSPI_BOOT -#define CONFIG_SYS_TEXT_BASE 0x40100000 -#endif - #ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SPL_PAD_TO 0x1c000 -#define CONFIG_SYS_TEXT_BASE 0x82000000 #define CONFIG_SYS_NAND_U_BOOT_SIZE (400 << 10) #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO @@ -96,17 +83,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_MONITOR_LEN 0x80000 #endif -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0x60100000 -#endif - -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_DDR_SPD #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ #ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_DDR_RAW_TIMING #endif @@ -122,12 +102,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ - !defined(CONFIG_QSPI_BOOT) -#define CONFIG_U_QE -#define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#endif - /* * IFC Definitions */ @@ -163,9 +137,6 @@ unsigned long get_board_ddr_clk(void); FTIM2_NOR_TWP(0x1c)) #define CONFIG_SYS_NOR_FTIM3 0 -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS @@ -350,7 +321,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_LPUART #define CONFIG_LPUART_32B_REG #else -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #ifndef CONFIG_DM_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -367,6 +337,15 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 + /* * I2C bus multiplexer */ @@ -377,7 +356,6 @@ unsigned long get_board_ddr_clk(void); /* * MMC */ -#define CONFIG_FSL_ESDHC /* SPI */ #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) @@ -395,25 +373,6 @@ unsigned long get_board_ddr_clk(void); #endif #endif -/* - * USB - */ -/* EHCI Support - disbaled by default */ -/*#define CONFIG_HAS_FSL_DR_USB*/ - -#ifdef CONFIG_HAS_FSL_DR_USB -#define CONFIG_USB_EHCI_FSL -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#endif - -/*XHCI Support - enabled by default*/ -#define CONFIG_HAS_FSL_XHCI_USB - -#ifdef CONFIG_HAS_FSL_XHCI_USB -#define CONFIG_USB_XHCI_FSL -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif - /* * Video */ @@ -430,10 +389,8 @@ unsigned long get_board_ddr_clk(void); /* * eTSEC */ -#define CONFIG_TSEC_ENET #ifdef CONFIG_TSEC_ENET -#define CONFIG_MII #define CONFIG_MII_DEFAULT_TSEC 3 #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" @@ -477,11 +434,9 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_PCI #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_CMD_PCI #endif #define CONFIG_CMDLINE_TAG -#define CONFIG_CMDLINE_EDITING #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS @@ -513,13 +468,6 @@ unsigned long get_board_ddr_clk(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff @@ -545,24 +493,9 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_OVERWRITE #if defined(CONFIG_SD_BOOT) -#define CONFIG_ENV_OFFSET 0x300000 #define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_ENV_SIZE 0x2000 -#elif defined(CONFIG_QSPI_BOOT) -#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ -#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ -#define CONFIG_ENV_SECT_SIZE 0x10000 -#elif defined(CONFIG_NAND_BOOT) -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE) -#else -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif -#define CONFIG_MISC_INIT_R - #include #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */